Celoxica and IPFlex Announce C-Based Design Flow for DAPDNA Dynamically Reconfigurable Processor.Business Editors/High-Tech Writers Design Automation Conference 2004 Booth 1345 ABINGDON, England & TOKYO--(BUSINESS WIRE)--May 17, 2004 C-language Compiler compiler Computer software that translates (compiles) source code written in a high-level language (e.g., C++) into a set of machine-language instructions that can be understood by a digital computer's CPU. Supports IPFlex DAPDNA-FW II Integrated Development Environment Celoxica Ltd. and IPFlex Inc. today announced an alliance to extend Celoxica C-based synthesis technology to the IPFlex Digital Application Processor/Distributed Network Architecture (DAPDNA) dynamically reconfigurable processor technology. The alliance has already resulted in a C-language to reconfigurable hardware compiler based on Celoxica technology. The compiler provides a high-productivity design environment for developing applications on DAPDNA hardware. The IPFlex DAPDNA-FW II version 2.3 integrated development environment See IDE. integrated development environment - interactive development environment , including the new compiler, will be demonstrated in the Celoxica exhibit space, Booth 1345, at the Design Automation Conference on June 7-11 in San Diego, California “San Diego” redirects here. For other uses, see San Diego (disambiguation). San Diego is a coastal Southern California city located in the southwestern corner of the continental United States. As of 2006, the city has a population of 1,256,951. . IPFlex was founded to solve the often-conflicting concepts of software flexibility and hardware performance. The company's DAPDNA technology enables systems described in software languages, such as C, to be implemented in silicon devices with performance equivalent to custom-designed chips, with a combination of its FW II design tool and the DAPDNA-2 dynamically reconfigurable processor. Celoxica develops EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. tools for system design and the technology behind their DK Design Suite is the state-of-the-art solution for compilation of C-based languages to reconfigurable hardware. "The application of Celoxica compilation technology to the IPFlex dynamically reconfigurable architecture is an exciting and natural extension of our core capability," said Celoxica CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. Phil Bishop. "Both companies are dedicated to the rapid implementation of software algorithms into high-performance dynamically reconfigurable hardware. Celoxica brings the hardware compilation technology and the system tools focus that will extend and maintain the system design flow for IPFlex users." "This alliance enhances the IPFlex design tool and gives us the most efficient implementation path for C-based applications," said Tomoyoshi Sato, IPFlex CTO (Chief Technical Officer) The executive responsible for the technical direction of an organization. See CIO and salary survey. . "Developers can use C language descriptions to target the DAPDNA-2 dynamically reconfigurable processor and achieve immediate results in silicon with performance comparable to custom devices. I believe that this feature will dramatically reduce the development cost." About Celoxica An innovator in system-level electronic design automation (EDA), Celoxica supplies the design technology, IP and services that define Software-Compiled System Design, a methodology that exploits higher levels of design abstraction In object technology, determining the essential characteristics of an object. Abstraction is one of the basic principles of object-oriented design, which allows for creating user-defined data types, known as objects. See object-oriented programming and encapsulation. 1. to dramatically improve silicon design productivity. Celoxica's products address hardware/software partitioning To divide a resource or application into smaller pieces. See partition, application partitioning and PDQ. , co-verification and C-based synthesis to reconfigurable hardware. Established in 1996, Celoxica offers a proven route from complex software algorithms to hardware, and provides an ideal design environment for reconfigurable electronics with significant productivity advantages for digital signal processing See DSP. Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled). applications such as imaging, electronic security and communications. For more information, visit: www.celoxica.com. About IPFlex IPFlex develops dynamically reconfigurable processors and its integrated development software. Dynamically reconfigurable processor based on Digital Application Processor/Distribute Network Architecture (DAPDNA) is designed as a dual-core processor comprised of a high-performance RISC RISC in full Reduced Instruction Set Computing Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s. core and a dynamic reconfigurable processor core, and it is a platform that provides hardware performance while maintaining software flexibility. The DAPDNA dynamic reconfigurable processor series is provided with the DAPDNA-FW II as the integrated software Separate software components or applications that have been combined into one package. See integrated software package. development environment. It provides compilers for algorithms written in MATLAB/Simulink and C with data flow extension, thus realizing high-abstraction level algorithm design Algorithm design is a specific method to create a mathematical process in solving problems. Applied algorithm design is Algorithm engineering. Algorithm design is identified and incorporated into many solution theories of operation research, such as dynamic and leveraging existing intellectual properties of users. Using DAPDNA can dramatically increase programming productivity and cut cost considerably. For more information, please visit: http://www.ipflex.com. IPFlex(R), DAPDNA(R), Software to Silicon(R) and IPFlex logo are registered trademarks of IPFlex Inc. Celoxica and the Celoxica logo are trademarks of Celoxica, Ltd. All other brand names and product names are the property of their respective owners. |
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