Celoxica Releases C Synthesis Toolkit for Altera SOPC Builder.Business Editors/High-Tech Writers CAMPBELL, Calif.--(BUSINESS WIRE)--May 24, 2004 DK Accelerator Implements C-language Algorithms Directly to FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. Hardware In Integrated Altera SOPC SOPC System on a Programmable Chip SOPC Special Operations Preparation Course SOPC Second-Order Power Control SOPC Shuttle Operations and Planning Center SOPC 1-Stearoyl-2-Oleoyl-Sn-Glycero-3-Phosphatidylcholine SOPC Shaastra Online Programming Contest Design Flow Celoxica, Ltd., the technology leader in C-based synthesis and system-level design, today announced availability of the DK Accelerator for Altera's SOPC Builder. The DK Accelerator generates FPGA hardware components directly from Handel-C descriptions for use in the SOPC Builder system development tool. The DK Accelerator, combined with SOPC Builder, provides a fast, seamless and automated implementation path for C-language algorithms to system-on-a-programmable chip (SOPC) designs. SOPC Builder, an automated system-integration tool included within the Altera Quartus Altera Quartus is a programmable logic device designer for Microsoft Windows from Altera. The latest version (as of April 2007) is 7.0, and its features include:
A source of competitive advantage that depends on producing some item that is regarded to have unique and valuable characteristics. . The created components can be used and re-used in the same manner as other off-the-shelf components. "The DK Accelerator gives users a direct path to move their custom algorithms and C-language descriptions into FPGA logic. SOPC Builder provides the hardware integration tool to create a working system without the need for an HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. designer," said Joe Hanson, Altera's marketing director for system-level development tools. "Adoption of ESL (1) An earlier family of client/server development tools for Windows and OS/2 from Ardent Software (formerly VMARK). It was originally developed by Easel Corporation, which was acquired by VMARK. design requires the application of higher-levels of abstraction in ways that complement how designers actually think and work. The combination of Celoxica synthesis with SOPC Builder integration provides this type of natural extension." The DK Accelerator for SOPC Builder tool provides cycle-accurate simulation and synthesis of algorithms to Altera FPGA devices from Handel-C, a superset A group of commands or functions that exceed the capabilities of the original specification. Software or hardware components designed for the original specification will also operate with the superset product. However, components designed for the superset will not work with the original. of ANSI-C for hardware synthesis. The toolkit also includes automatic generation of SOPC Builder component interfaces and an API for component interaction with an embedded processor A CPU chip used in a system other than a general purpose workstation, desktop or laptop computer. Such chips are used by the billions every year in a myriad of products. See embedded system. . "Whether for acceleration, for design flexibility or for prototyping, designers are choosing FPGA devices to implement complex system algorithms," said Jeff Jussel, vice-president of marketing for Celoxica. "Combining Celoxica C-language synthesis with the ease of integration of SOPC Builder provides Altera users with a unique and fast path to the realization of those algorithms." About Celoxica An innovator in system-level electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ), Celoxica supplies the design technology, IP and services that define Software-Compiled System Design, a methodology that exploits higher levels of design abstraction to dramatically improve silicon design productivity. Celoxica's products address hardware/software partitioning, co-verification and C-based synthesis to reconfigurable hardware. Established in 1996, Celoxica offers a proven route from complex software algorithms to hardware, and provides an ideal design environment for reconfigurable electronics with significant productivity advantages for digital signal processing See DSP. Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled). applications such as imaging, electronic security and communications. For more information, visit: www.celoxica.com. Celoxica and the Celoxica logo are trademarks of Celoxica, Ltd. All other brand names and product names are the property of their respective owners. |
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