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Celoxica Joins Synopsys in-Sync Program for Verification And Implementation.


ABINGDON, England -- System-level and Custom IP Designers Benefit From Flow Development Connecting Celoxica's Suite of ESL (1) An earlier family of client/server development tools for Windows and OS/2 from Ardent Software (formerly VMARK). It was originally developed by Easel Corporation, which was acquired by VMARK.  Design Tools to the Synopsys Design Compiler Family

Celoxica, a leading provider of C-based design and synthesis solutions, today announced design flow development through the Synopsys(R) (Nasdaq:SNPS SNPS Space Nuclear Power System ) in-Sync(R) program. This development formalizes the interoperability between Celoxica's Agility Compiler and DK Design Suite with the Design Compiler(R) synthesis solution from Synopsys, Inc.

Celoxica's design tools for system level co-design and the rapid development of custom intellectual property cores from C-algorithms, enable designers to retain their single source C files through design exploration, verification and implementation. Celoxica's ESL approach provides the capability for the automatic generation and synthesis of IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields.  compliant RT level VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. , Verilog and FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market.  netlists from ANSI-C or SystemC algorithmic descriptions.

"Celoxica's tools have become a distinctive part of the ASIC/SoC design flow, now that it connects to the leading hardware implementation flow," said Jeff Jussel, vice president of Marketing for Celoxica. "Linking the Celoxica ESL tools to Synopsys' Design Compiler tools is an important step in realizing the full potential of ESL design."

The development and verification of tool interoperability is being managed through the Synopsys in-Sync program. The initial focus is the optimization of RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences;  generated from Celoxica's tools for Design Compiler tools.

"For years Synopsys has initiated programs of its own and worked with standards bodies Following are some of the standards bodies defined in this database. For Windows users of CDE, look up Lessons/Review/Associations. For Web users of CDE's online HTML version, review the Lessons list at the bottom of the definition.

Organization Covers ANSI U.S.
 and industry organizations to advance tool interoperability throughout the electronic design automation industry," said Karen Bartleson, director of Interoperability at Synopsys, Inc. "Through the in-Sync interoperability program, Synopsys enables EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board.  vendors to identify and implement interoperable design flows that maximize the productivity of our mutual customers."

About Celoxica

An innovator in Electronic System Level (ESL) design, Celoxica supplies the design technology, IP and services that define Software-Compiled System Design, a methodology that exploits higher levels of design abstraction to dramatically improve silicon design productivity. Celoxica's products address hardware/software partitioning, co-verification and C-based synthesis. Established in 1996, Celoxica offers a proven route from complex algorithms to hardware, and provides a portfolio of ESL design tools that deliver significant productivity advantages for digital signal processing See DSP.

Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled).
 applications such as imaging, electronic security and communications. For more information, visit: www.celoxica.com.

Celoxica and the Celoxica logo are trademarks of Celoxica, Ltd. Synopsys, Design Compiler and in-Sync are registered trademarks of Synopsys, Inc. All other brand names and product names are the property of their respective owners.
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No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2005, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Geographic Code:1USA
Date:Jan 20, 2005
Words:405
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