Celestry Introduces Cell Noise Characterization Software, Socle Selects Celestry for Sign-off; Nautilus-SI and CellXpert-CN Pair Up for Accurate Signal Integrity Sign-Off.Business Editors/High-Tech Writers SAN JOSE San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. , Calif.--(BUSINESS WIRE)--April 8, 2002 Celestry Design Technologies, Inc., the leading provider of Silicon Accurate Sign-off(TM) technology for the semiconductor and electronics industry, announced today that it is shipping the first member of its cell noise characterization family of products -- CellXpert-CN(TM). In addition, Celestry announced that Socle so·cle n. 1. A plain square block higher than a plinth, serving as a pedestal for sculpture, a vase, or a column. 2. A plain plinth supporting a wall. Technology Corp. (Hsin-Chu, Taiwan), a TSMC TSMC Taiwan Semiconductor Manufacturing Company, Ltd TSMC Taiwan Semiconductor Manufacturing Corporation TSMC Traffic Systems Management Center TSMC Toll Station Management Controller TSMC Transportation Supply Maintenance Command TSMC Technical Services Manager Code Design Center Alliance company, has selected CellXpert-CN for cell noise characterization and Celestry's Nautilus-SI(TM) for signal integrity sign-off by Socle's RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; 2Silicon service. CellXpert-CN eliminates cell noise library characterization iterations by using an algorithm that reduces the effort to a single pass. It also reduces the amount of false errors during signal integrity analysis and speeds design debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits. to increase productivity. "After a detailed evaluation of Nautilus-SI and CellXpert-CN's cell library noise characterization, we found the methodology fits well with our SoC-ImP(TM) technology, and gives us the best solution for our cell-based signal integrity analysis sign-off," remarked David Lyou, Socle's general manager. Lyou added, "Compared with other cell library noise characterization methodologies, we found that CellXpert-CN offers a higher level of accuracy by taking into account the transition time and capacitive loading information found in our timing library. Nautilus-SI, with its cell noise library, gives our designers an accurate signal integrity tool for analyzing the effects of delay change and noise due to coupling without going through the full dynamic transistor-level analysis process. Working closely with Celestry's team, we have implemented this new methodology in our deep submicron design flow for signal integrity sign-off from the RTL (Register Transfer Level)." Zhihong Liu, president and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of Celestry noted, "As part of our Silicon-Accurate Sign-off efforts, CellXpert-CN is the first product in our noise characterization family. Later this year, we will introduce more noise characterization products for intellectual property, memory and analog mixed-signal designs." More About CellXpert-CN CellXpert-CN provides noise characterization for standard cells as well as I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output cells, and supports combinational, sequential and tri-state logic cells. The inputs to CellXpert-CN are Spice model parameters, cell library-timing data in Synopsys (.lib) or Cadence cadence, in music, the ending of a phrase or composition. In singing the voice may be raised or lowered, or the singer may execute elaborate variations within the key. (tlf) format and Spice/CDL circuit netlist with RC information. The output of CellXpert-CN is a noise library file (nlib). About Nautilus-SI For SoC design, Nautilus-SI offers full-chip signal integrity verification software for deep submicron multi-million cell designs. It incorporates 3D parasitic par·a·sit·ic or par·a·sit·i·cal adj. 1. Of, relating to, or characteristic of a parasite. 2. Caused by a parasite. Parasitic Of, or relating to a parasite. extraction technology to accurately determine coupling capacitance capacitance, in electricity, capability of a body, system, circuit, or device for storing electric charge. Capacitance is expressed as the ratio of stored charge in coulombs to the impressed potential difference in volts. . With its delay analysis engine, it captures coupling effects on timing and identifies signal integrity problems due to coupling noise. Price and Availability Celestry's CellXpert-CN with Nautilus-SI is available now. Nautilus-SI with CellXpert-CN starts at $115,000 for a time-based license (TBL Tbl - 1. A language by M.E. Lesk for formatting tables, implemented as a preprocessor to nroff. ). The software runs on Sun Solaris. About Socle Technology Corp. Since its inception in June 2001, Socle has focused on developing its own platform based technologies (SoC-ImP(TM) and uPlatform(TM)) and deploying the design services derived with the vision to become the worldwide leader of the SoC design platform solutions provider. Socle works with foundries, EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. , library/IP providers and other service partners to provide the best-fit solutions and services to customers. Its SoC-ImP(TM) environment provides the most advanced and optimized deep submicron (DSM 1. DSM - Data Structure Manager. An object-oriented language by J.E. Rumbaugh and M.E. Loomis of GE, similar to C++. It is used in implementation of CAD/CAE software. DSM is written in DSM and C and produces C as output. ) SoC design flow methodology for RTL2Silicon service based on world leading EDA tools. Socle is a member of TSMC's Design Center Alliance. For more information, please visit www.socle-tech.com.tw. About Celestry Celestry is the leading provider of physical design products that enable integrated circuit integrated circuit (IC), electronic circuit built on a semiconductor substrate, usually one of single-crystal silicon. The circuit, often called a chip, is packaged in a hermetically sealed case or a nonhermetic plastic capsule, with leads extending from it for designers to achieve optimal performance from semiconductor process technologies. The Company offers software and services to electronic and semiconductor companies involved with the design of chips that are used in networking, communication, multimedia and computing products. For more information visit www.celestry.com or email info@celestry.com. Celestry Design Technologies, Inc. is headquartered at 1982A Zanker Road, San Jose, CA 95112, U.S.A., Phone: 408/451-1210, FAX: 408/451-1211.
Notes to Editors:
Acronyms and definitions
.lib Synopsys library format
CN: Cell Noise
IC: Integrated Circuit
I/O: Input/Output
nlib: Celestry noise library format
RC: Resistance and Capacitance, refers to
parasitic R's and C's in IC interconnect
SoC: System on Chip
SI: Signal Integrity
RTL or RT-level: Register Transfer Level
SPICE: Industry standard circuit simulator
SPICE/CDL: Cadence SPICE netlist format
tlf: Cadence library format
Celestry, the Celestry logo, CellXpert-CN, Nautilus-SI and Silicon-Accurate Sign-off are trademarks of Celestry Design Technologies, Inc. All other trademarks and tradenames are the property of their respective owners. |
|
||||||||||||
Printer friendly
Cite/link
Email
Feedback
Reader Opinion