Cavium Networks to Exhibit at RSA Conference in San Francisco's Moscone Center, April 20 - April 24, 2009 at BOOTH #323.Press kit materials are available online at www.virtualpressoffice.com/kit/CaviumNetworksRSA09 MOUNTAIN VIEW, Calif. -- Meet with Cavium Networks' top management team and see the following presentation based on the OCTEON[TM] II Internet Application Processors, NITROX Security Processors and Accelerator Boards and a joint Continuous Computing / Cavium Networks demonstration. OCTEON Multi-core MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. 64[R] Processors Cavium Networks OCTEON multi-core processors integrate custom cnMIPS64 processor cores with the industry's most advanced multi-layer application acceleration and security processing hardware, along with a wide range of networking I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output options to deliver breakthrough features, price/performance and power for next generation networking Next Generation Networking (NGN) is a broad term to describe some key architectural evolutions in telecommunication core and access networks that will be deployed over the next 5-10 years. , wireless, control and storage applications. * CN63XX: up to 1.5 GHz/core with large 2MB L2 cache and enhanced core architecture * CN58XX: has up to 16 cnMIPS cores, 2MB L2, 8x GEs/2x SPI-4.2, 144-bit DDR (Double Data Rate) Refers to an SDRAM memory chip that increases performance by doubling the effective data rate of the frontside bus. For more details, see SDRAM. DDR - Double Data Rate Random Access Memory 2 controller, 32 RegEx engines * CN50XX: up to 2 cnMIPS cores, up to 128KB L2, 3GEs, 32bit DDR2 controller NITROX[R] Security Processors Cavium Network's award winning NITROX families of security processors offer solutions delivering 50 Mbps to 10Gbps of encryption bandwidth with 1K to 50K RSA/DH operations per second. Cavium's NITROX families of Security Macro Processors deliver unprecedented performance in wired and wireless network security applications and SSL (Secure Sockets Layer) The leading security protocol on the Internet. Developed by Netscape, SSL is widely used to do two things: to validate the identity of a Web site and to create an encrypted connection for sending credit card and other personal data. based secure e-Business while significantly reducing the cost and complexity of deployment. Cavium's Accelerator Boards Cavium Networks has a broad family of over 12 distinct Accelerator Board products. These cards can plug into any PCI/PCI-X or PCIe Server Configuration. Supported form factors include mini-PCI, PCI (1) (Payment Card Industry) See PCI DSS. (2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus). , PCI-X (PCI eXtended) An enhanced PCI bus technology originally developed by IBM, HP and Compaq that is backward compatible with existing PCI cards. PCI and 32-bit PCI-X slots are physically the same, and PCI cards can plug into PCI-X slots. and PCIe half height and PCI & PCI-X Full Height cards. Cavium's Ecosystem Partner Demonstration A joint Continuous Computing / Cavium Networks demonstration combines market-leading Trillium LTE protocol software integrated with the Cavium OCTEON Plus CN58xx Multi-Core MIPS64 processor. The demonstration will include the S1-MME interface (Trillium S1AP and SCTP (1) (Stream Control Transmission Protocol) An alternative to TCP that supports multiple transmission paths. Designed to facilitate SS7 signaling over TCP/IP, SCTP supports multiple IP addresses from the same host (multihomed host) and treats the data stacks) running on a Cavium OCTEON Plus CN58xx evaluation board. To Schedule a Meeting To schedule a meeting with Cavium Networks during the expo hours, please contact: sales@caviumnetworks.com. Please enter RSA Conference, Meeting in the subject line. |
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