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Cavendish Kinetics: Major New Embedded Memory Technology Announced.


Business Editors/High-Tech Writers

CAMBRIDGE, England--(BUSINESS WIRE)--June 7, 2004

Low power, high speed and easy incorporation into standard CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes.  

processes 200 degrees Centigrade operating temperature and inherent

radiation hardness

Cavendish Kinetics, which was born out of Cambridge University, today announced a major new technology which will offer the lowest power and entry-cost embedded non-volatile memory (NVM (Non-Volatile RAM) See NVRAM. ) in the industry. The company's Nanomech(TM) technology is capable of simple incorporation into standard CMOS and other processes and will offer semiconductor companies and foundries a lower power, higher speed alternative to embedded Fuse, Flash and EEPROM (Electrically Erasable Programmable ROM) A rewritable memory chip that holds its content without power. Although EEPROMs spawned flash memory, EEPROMs are byte addressable at the write level, whereas flash chips must erase a block of bytes before rewriting. .

The company, which employs 25 people, has its headquarters in Holland and already has functional Silicon. The company's research is based at the Cavendish Laboratories in the UK while process development is undertaken at facilities in Stuttgart, Germany. It intends to announce its first IP (Intellectual Property) product, aimed at the lucrative e-fuse market, in the third quarter of 2004.

The following year will see the introduction of embedded One-Time Programmable (eOTP) and embedded Many-Times Programmable (eMTP) versions. Founded in 1994, Cavendish Kinetics has received funding of $6.5 million from several sources including Canadian Venture Capitalist, Celtic House, and European entrepreneur and co-founder Hermann Hauser.

The patented Nanomech technology is the subject of over 10 years of research at Cavendish Kinetics and based on moveable structures. Each sub-micron structure represents one bit of memory and requires only 25 PicoJoules to program it, thereby giving rise to the exceptionally low write/erase power requirements. The technology is process scaleable and can be used with process nodes to below 45 nanometers.

Embedded memory structures based on Nanomech technology can withstand operating temperatures up to +200 degrees Centigrade, well in excess of the +125 degrees Centigrade normally associated with semiconductor products. Similarly the radiation tolerance specifications exceed those of the underlying Silicon. Furthermore, because of the negligible mass of the structures, a force of over 100 million times the force of gravity would be required to make a memory cell change state. In addition to its suitability for a vast array of embedded uses, these attributes alone make the technology ideal for automotive, medical, aerospace, military, industrial and many other applications.

Mike Beunder, Cavendish Kinetic's CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. , commented, "Apart from offering the lowest cost entry barrier for any embedded NVM technology, those involved in design and process integration will be immensely attracted by how easily it can be incorporated onto any standard CMOS, or even GaAs or SiGe process. We are confident that Nanomech will be a winner."

The complexity of the additional Nanomech elements used in an embedded circuit is low, and because they are freely located within the existing interconnect process, no re-qualification of process or design is necessary. Furthermore, the addition of the Nanomech technology does not involve investment in new processing equipment on the part of the fabrication facility.

Marlene Bourne Bourne, town (1990 pop. 16,064), Barnstable co., SE Mass., crossed by Cape Cod Canal; settled 1627, inc. 1884. Bourne Bridge (1935), across the canal, made the town an entry point to Cape Cod and a resort and commercial center. , Senior Analyst at In-Stat/MDR (a division of Reed Business Information Reed Business Information is a large business publisher in the United States, United Kingdom, continental Europe, Australia and Asia. It is a division of Reed Elsevier.

In 2005, Reed Business Information started the Quill Awards, a literary award broadcast on NBC.
), commented, "Licensing embedded IP frequently requires capital expense and re-qualification of designs or processes. Cavendish Kinetics' technology offers the possibility to both save cost and reduce time to market."

Paul Hedges, Cavendish Kinetics' Strategic Marketing Director, commented, "We believe our ultra-low power, flexible and cost-effective NVM technology will make big in-roads in many volume applications ranging from automotive controllers through to Smart Cards and RFID (Radio Frequency IDentification) A data collection technology that uses electronic tags for storing data. The tag, also known as an "electronic label," "transponder" or "code plate," is made up of an RFID chip attached to an antenna.  chips."

Rich Wawrzyniak, Senior Analyst, ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  - SoC, at Semico Research Corp. commented, "With the trend towards increasing numbers of CPU CPU
 in full central processing unit

Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit.
 and DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive  cores, the demand for embedded memory is going to do nothing but grow. The major hurdle is to find memory technologies that can be applied to popular processes and if these technologies don't require exotic materials and are in themselves relatively low cost, and if they give the memory densities at the right speeds, then the growth potential for this technology is very high".

The company will initially target the e-fuse market in embedded applications including trimming and feature selection for analog and mixed signal, redundancy, small user-programmable ROM arrays (UPROMS) as well as chip ID. Once the OTP (1) (One Time Programmable) Refers to programming content or logic into chips such as EPROMs and EEPROMs, which cannot be reversed. See antifuse.

(2) (One Time P
 and MTP (1) (Message Transfer Part) See SS7.

(2) (Media Transfer Protocol) A Microsoft enhancement to the picture transfer protocol (PTP), starting with Windows Media Player 10 in Windows XP.
 products are announced in 2005, the company will broaden its customer base while building on the relationships already in place with high growth high volume applications in the portable product, Smartcard and automotive sectors. As a supplier of IP, Cavendish Kinetics will work with its customers from product concept through to final production.

The company has an impressive management team and strong board-level representation. These includes founder, Charles Smith, reader in Nano Electronic Devices at Cambridge University, Mike Beunder, who held senior positions in Phillips Semiconductor and with start-up companies in California, and Paul Hedges who has many years global experience in both the semiconductor and telecoms industries. Other board members include David Brand, a veteran of the semiconductor industry and previously the head of AMD (Advanced Micro Devices, Inc., Sunnyvale, CA, www.amd.com) A major manufacturer of semiconductor devices including x86-compatible CPUs, embedded processors, flash memories, programmable logic devices and networking chips.  in the UK.

Ref: EML EML - Extended ML. A language for formally specifying SML programs.

["Formal Program Development in Extended ML for the Working Programmer", D. Sannella, Proc 3rd BCS/FACS Workshop on Refinement", Springer 1990].
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Date:Jun 7, 2004
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