Catalyst Semiconductor Sets Sight On $325M SPI EEPROM Market.Business Editors/High-Tech Writers SUNNYVALE, Calif.--(BUSINESS WIRE)--Oct. 3, 2002 Catalyst Semiconductor (Nasdaq:CATS) today announced it has completed qualification and released to production one of the most complete families of high-speed serial EEPROMs with an SPI (1) (Stateful Packet Inspection) See stateful inspection. (2) (Service Provider Interface) The programming interface for developing Windows drivers under WOSA. (TM) interface in the industry. "Market projections show that SPI interfaced EEPROMs should represent one-quarter of the serial EEPROM (Electrically Erasable Programmable ROM) A rewritable memory chip that holds its content without power. Although EEPROMs spawned flash memory, EEPROMs are byte addressable at the write level, whereas flash chips must erase a block of bytes before rewriting. market in 2005. This represents a $325 million3 opportunity," said Catalyst Product Marketing Manager Gary Craig. "The high-speed serial SPI interface is preferred over parallel interfaces in applications where speed, board density and low costs are crucial. Data communication and automotive applications are particularly well suited for SPI EEPROMs." Key Family Features -- Highest Speed Performance - 10MHz: 1kbit through 64kbit densities - 5MHz: 128kbit and 256kbit densities -- Versatile 3-bit Block and Write Protection - 10MHz: 1kbit through 64kbit densities -- Standard and Improved 2-bit Block Protection - Standard 2-bit block protection - Enhanced 2-bit block protection with software write protect enable -- Broadest Operating Voltage Range: 1.8volts to 6.0volts -- Lowest Power Consumption: 1microampere Standby Current -- Support for All SPI Clock/Phase Modes Catalyst's SPI family consists of 19 devices with memory density ranging from 1kbits to 256kbits. Speeds are 10MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. for all devices except the 128kbit and 256kbit devices that operate at 5MHz. Devices with standard 2-bit block protection, enhanced 2-bit block protection with software write protection and versatile 3-bit block protection with software write protection are offered. All four SPI clock/phase modes -- 00, 01, 10 and 11 -- are supported through factory programming options. Innovative Block Write Protection Methods Catalyst offers three block protection options: -- Standard 2-bit block write protection -- Enhanced 2-bit block write protection with software write protect enable -- Versatile 3-bit block write protection with software write protect enable A new 3-bit block write protection capability is available for the 1kbit through 64kbit density devices. A status register with three block protection bits makes single-page write protection possible. To write protect a small section of memory to hold, for example, a serial number or system ID, a large section of memory does not need to be locked. Single-page write protection uses the memory array efficiently and is especially important with higher density memories. The write protect enable bit, WPEN WPEN Western Pennsylvania Evaluation Network WPEN Wireless Packet Erasure Network , within the device status register, allows software control of the memory array's write protection. Write protection works with the hardware write protection pin to define which memory array segment is write protected. In addition, by using the write protect pin and WPEN, a device can be made to appear one-time writeable. Details are given in Catalyst's Design Note 8, which is available at http://www.catalyst-semiconductor.com/content/pdf/dn8.pdf. New Low Density SPI EEPROMs The most recent SPI EEPROMs introduced focus on lower density memories with 3-bit block write protection and software write protect enable.
Part Density Block Write Protection
2-bit 3-bit
CAT25C01 1 kbit Yes
CAT25010 1 kbit Yes
CAT25C11 1 kbit Yes
CAT25C02 2 kbit Yes
CAT25020 2 kbit Yes
CAT25C03 2 kbit Yes
CAT25C04 4 kbit Yes
CAT25C05 4 kbit Yes
CAT25040 4 kbit Yes
Data sheets for all SPI products are available at www.catalyst-semiconductor.com/eeprom. Prices depend on memory density and start at $0.26 in 10,000 piece quantities. Devices are available for sampling and production. About Catalyst Semiconductor Founded in 1985, Catalyst Semiconductor, Inc. is headquartered in Sunnyvale, California Sunnyvale ([sʌniveil]) is a city in Santa Clara County, California, United States. It is one of the major cities that make up the Silicon Valley. As of the 2000 census, the city population was 131,760. . The Company is a developer and marketer of programmable products used in telecommunications, networking systems, computation, automotive, industrial and consumer markets. The Company designs and markets a broad range of programmable products including Flash Memories, Parallel and Serial EEPROMs with I2C I2C Inter-Integrated Circuit I2C Intelligent Interface Controller I2C Intelligent Controller , SPI and Microwire interfaces, NVRAMs, Digitally Programmable Potentiometers, Microcontroller A single chip that contains the processor (the CPU), non-volatile memory for the program (ROM or flash), volatile memory for input and output (RAM), a clock and an I/O control unit. Supervisory circuits Supervisory circuits are semiconductor devices that detect and monitor voltage levels in power supplies, microprocessors, and other systems. They are protection circuits that monitor one or more system parameters. and other programmable Mixed Signal products. Typical applications for the Company's products include optical networks, modems, wireless LANs, network cards, PC BIOS See BIOS. , DIMM (Dual In-Line Memory Module) A printed circuit board that holds memory chips and plugs into a DIMM socket on the motherboard. See memory module. DIMM - Dual In-Line Memory Module modules, cellular telephones, digital satellite box receivers, set-top boxes and Internet routers. Catalyst's Quality Management System is ISO (1) See ISO speed. (2) (International Organization for Standardization, Geneva, Switzerland, www.iso.ch) An organization that sets international standards, founded in 1946. The U.S. member body is ANSI. 9001 certified. Additional information about Catalyst Semiconductor is available on the Company's web site at www.catalyst-semiconductor.com. Except for those statements that report the Company's historical results, the statements being made are forward-looking statements forward-looking statement A projected financial statement based on management expectations. A forward-looking statement involves risks with regard to the accuracy of assumptions underlying the projections. . Actual results could differ materially from those projected in the forward-looking statements. Additional information concerning factors that could cause actual results to differ materially from those in the forward-looking statements is contained under the heading "Certain Factors That May Affect the Company's Future Results of Operations" listed from time to time in Catalyst's SEC reports including but not limited to the report on Form 10-K Form 10-K A report required by the SEC from exchange-listed companies that provides for annual disclosure of certain financial information. Form 10-K See 10-K. for the year ended April 30, 2002, and Form 10-Q Form 10-Q See 10-Q. for the quarter ended July 31, 2002. Editor Notes: 1. Trademark notices: DPP DPP - Dining Philosophers Problem is a trademark of Catalyst Semiconductor. I2C is a registered trademark of Philips Corporation. SPI is a trademark of Motorola, Inc. Microwire is a trademark of National Semiconductor. 2. Electronic images are available at www.catalyst-semiconductor.com/editor. 3. Source: Web-Feet Research |
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