Carbon's DesignPlayer Engine Executes in CoWare's SystemC Simulator; High-Performance RTL Engine Linked into SystemC.WALTHAM, Mass. -- Carbon Design Systems--a fast moving EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. company that reduces time-to-profit for chip companies by improving hardware regression performance and enabling pre-silicon system validation--announced today that it has integrated Carbon's DesignPlayer(TM) engine into CoWare's ConvergenSC SystemC simulator and joined CoWare's CoTeam partnership program. "This landmark integration allows RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; to be executed in CoWare's SystemC simulator," emphasized Steve Butler Steve Butler (born September 26, 1956 in Amarillo, Texas) was an open-wheel racer who was successful in USAC Sprint Car and Silver Crown racing. Steve currently resides in Kokomo, IN. , president and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of Carbon. "Our joint customers can now use a SystemC simulator with the freedom to swap between an architectural model An architectural model is a tangible representation of a structure (typically a scale model) built to communicate design ideas to clients, owners, committees, customers, and the general public. and the RTL model of a design while maintaining the performance required for software validation The certification that an information system has been implemented correctly and that it conforms to the functional specifications derived from the original requirements. Such validation is often performed by a third party consulting organization. ." "Carbon's DesignPlayer integration enables mutual customers to incorporate legacy IP into high speed SystemC simulations using ConvergenSC," said Mark Milligan Mark Milligan (born August 4, 1985 in Sydney, Australia) is an Australian football (soccer) player who currently plays for Australian A-League club Sydney FC. He is a utility defender, originally known as a Right-Back, but more recently playing in both Central Defence and Central , VP of Marketing at CoWare. "This complements our SystemC ConvergenSC Model Library containing 3rd party IP, by giving customers the ability to use DesignPlayer to generate fast software objects of their IP that can be directly linked into a ConvergenSC simulation." About the Integration Carbon's SPEEDCompiler(TM) software reads synthesizable Verilog and generates a high-performance engine--DesignPlayer--that now includes an optional SystemC wrapper A data structure or software that contains ("wraps around") other data or software, so that the contained elements can exist in the newer system. The term is often used with component software, where a wrapper is placed around a legacy routine to make it behave like an object. . DesignPlayer is a software object that can be directly linked into a SystemC simulator, such as CoWare's ConvergenSC. In contrast to co-simulation approaches, a DesignPlayer engine becomes part of a unified SystemC simulation. DesignPlayer can represent one or more chips and multiple engines can represent a system that encompasses hundreds of millions of gates. DesignPlayer is a soft-model that is accurate to the hardware--cycle and register accurate. Unlike behavioral models or C models generated from an ideal specification, DesignPlayer behaves exactly like the hardware with all its errata er·ra·ta n. Plural of erratum. . Hardware designers now have the cycles they need to run complete regression suites before chip tapeout. Software designers can finally test and debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits. their code on a high performance, cycle accurate, linkable model. Customers get an executable specification that contains the silicon errata for system integration and test. About Carbon Design Systems Carbon is delivering software products that enable high-performance pre-silicon chip and system validation. Carbon's single engine solution--DesignPlayer--can be used for hardware, software, and customer design validation. The DesignPlayer engine boosts hardware regression performance and validates drivers, diagnostics, & firmware up to 50X faster with cycle and register accuracy. A low-cost executable or linkable model can be deployed across the enterprise and to customers without the encumbrances of a slow simulator. Carbon's new approach shortens schedules and accelerates time-to-profit by enabling validation to occur in parallel with hardware development. Product schedules can be cut significantly, with validation starting as early as the first stable RTL. Problems are found and resolved before fabrication--rather than waiting for custom models to be built or silicon to be delivered. The company is headquartered at 375 Totten Pond Road, Suite 100/200, Waltham, MA. 02451. Telephone: 781.890.1500, Fax: 781.890.1711, Email: info@carbondesignsystems.com, Website: www.carbondesignsystems.com or SPEEDCompiler.com Carbon Design Systems, SPEEDCompiler, and DesignPlayer are trademarks of Carbon Design Systems, Incorporated. All other companies and products referenced herein are trademarks or registered trademarks of their respective holders. |
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