Printer Friendly
The Free Library
19,573,952 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

Cadence and CoWare Alliance to Provide Unified System-to-Silicon Design Solution; SystemC-Based Transaction-Level Design Unites Cadence Incisive and CoWare ConvergenSC.


Business Editors/High-Tech Writers

SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif.--(BUSINESS WIRE)--Sept. 8, 2003

Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services.

http://cadence.com/.

See also Verilog.
, Inc. (NYSE NYSE

See: New York Stock Exchange
:CDN (Content Delivery Network) A system of distributed content on a large intranet or the public Internet in which copies of content are replicated and cached throughout the network. ) and CoWare, Inc. today announced a strategic alliance to accelerate time-to-market for system-on-chip (SoC) design teams through a standards-based system-to-silicon-design solution. This multifaceted relationship includes joint development, cross-licensing, a coordinated go-to-market and standards strategy, and a Cadence equity investment in CoWare(R). The alliance provides a unified solution from electronic system-level (ESL (1) An earlier family of client/server development tools for Windows and OS/2 from Ardent Software (formerly VMARK). It was originally developed by Easel Corporation, which was acquired by VMARK. ) design through RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences;  implementation for advanced SoC designs and a new connection in the design chain.

"Customers designing complex systems are asking for a new generation of electronic design," said Penny Herscher, Cadence executive vice president and general manager. "As the leader in functional verification Functional verification, in electronic design automation, is the task of verifying that the logic design conforms to specification. In everyday terms, functional verification attempts to answer the question "Does this proposed design do what is intended?" This is a complex task,  -- committed to providing the best technology platforms for our customers -- we are teaming up with CoWare, the leader in ESL, to form this first of its kind alliance. Based on shared technology and a common go-to-market approach, this alliance will provide the solutions our customers are asking for and develop the market."

Electronic design companies have long had separate system and IC design teams, each with their own unique development environment. With increasingly complex SoC designs, the gap between system and IC design environments has become a critical bottleneck.

"A new level of design abstraction only occurs once a decade and each has a profound, long-term market impact," said Alan Naumann, CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board.  of CoWare. "Enabling this next move requires connecting the software-centric world of systems design to hardware verification. By partnering with Cadence, the leader in unified verification technology, we are linking these worlds using open standards Specifications for hardware and software that are developed by a standards organization or a consortium involved in supporting a standard. Available to the public for developing compliant products, open standards imply "open systems;" that an existing component in a system can be replaced . This will accelerate the adoption of the new ESL methodology by making it easy to plug into our customers' existing verification flows."

CoWare and Cadence are seizing the opportunity created by the SystemC standard to provide a new level of design capability, speed, and efficiency. The first step is the creation of a system-to-silicon design solution based on CoWare's ConvergenSC(TM) and LISATek(TM) system-level design products and the Cadence(R) Incisive(TM) functional verification platform. The allied companies are working with SoC design leaders such as ARM to ensure this unified flow is supported by interoperable IP.

"ARM is committed to working with its partners to develop and promote open technology solutions that accelerate platform-based design of advanced SoCs," said Simon Segars, executive vice president, Engineering at ARM. "Cadence and CoWare bring together leading system-level design and verification tools. Through our collaboration with them on SystemC models, more design teams will now be able explore ARM core-based designs earlier in the product cycle."

The Alliance

The alliance is a multifaceted relationship that leverages each company's technology and business strengths. It promotes the rapidly emerging transaction level of abstraction The level of complexity by which a system is viewed. The higher the level, the less detail. The lower the level, the more detail. The highest level of abstraction is the single system itself.  enabled by the SystemC standard system language, and provides the critical link for unifying the two worlds of system and IC design.

"STMicroelectronics, as a worldwide leader in System-on-Chip (SoC) for the consumer, telecom and other markets, depends on designing new SoC architectures rapidly for the marketplace. We firmly believe that this capability is enabled by assembling design blocks, all modeled at the same, industry-standard, high level of abstraction," said Philippe Magarshack, Central R&D group vice-president, Design Automation at STMicroelectronics. "We are adopting SystemC as the base for all our new system developments and we have been proposing to OSCI, together with Cadence and CoWare, as well as ARM, a possible transaction-level modeling Transaction-level modeling (TLM) is a high-level approach to modeling digital systems where details of communication among modules are separated from the details of the implementation of functional units or of the communication architecture.  paradigm, and trust that OSCI will converge it rapidly into an industry-adopted standard. By working closely together, Cadence and CoWare will bring to our system designers a solution that understands this emerging standard, and covers design and verification of both Software and Hardware."

The two companies will coordinate their go-to-market activities, with CoWare focusing on the electronic system-level design market, while Cadence focuses on the functional verification market. The companies' field sales and support teams will have shared goals and aligned interests in making joint customers successful.

As part of a special licensing agreement, the financial terms of which were not disclosed, Cadence has transferred to CoWare its Signal Processing See DSP.  Worksystem (SPW SPW Signal Processing Workstation
SPW Shelter in Place Warning
SPW Spencer, IA, USA - Spencer Municipal Airport (Airport Code)
SPW Special Purpose Weapon
SPW Spokane Washington (border patrol sector) 
) group. The addition of SPW extends CoWare's ESL leadership by adding algorithm design Algorithm design is a specific method to create a mathematical process in solving problems. Applied algorithm design is Algorithm engineering.

Algorithm design is identified and incorporated into many solution theories of operation research, such as dynamic
 to its processor, bus, SoC architecture, and hardware/software co-design tools. Cadence also has made an equity investment in CoWare.

About CoWare

CoWare, the leading supplier of system-level electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) software, is revolutionizing system on chip (SoC) and embedded software development by enabling engineers to create design platforms optimized for specific market requirements. Its software is employed today by major systems, intellectual property (IP) and semiconductor companies worldwide. For the second year, the Silicon Valley/San Jose Business Journal has recognized CoWare as one of the fastest-growing private companies in Silicon Valley. For more information, visit http://www.coware.com.

About Cadence

Cadence is the largest supplier of electronic design technologies, methodology services, and design services. Cadence solutions are used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics based products. With approximately 5,000 employees and 2002 revenues of approximately $1.3 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange New York Stock Exchange (NYSE)

World's largest marketplace for securities. The exchange began as an informal meeting of 24 men in 1792 on what is now Wall Street in New York City.
 under the symbol CDN. More information about the company, its products and services is available at www.cadence.com.

Cadence and the Cadence logo are registered trademarks, and Incisive is a trademark of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

CoWare is a registered trademark, and ConvergenSC and LISATek are trademarks of CoWare, Inc. All other trademarks are the property of their respective owners.
COPYRIGHT 2003 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2003, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Geographic Code:1USA
Date:Sep 8, 2003
Words:948
Previous Article:Secure Computing SmartFilter Integrates On-Box With Blue Coat ProxySG Appliance.
Next Article:Symantec Unveils Norton SystemWorks 2004 with New Password Management Tool for Easier, Safer Computing.
Topics:



Related Articles
OPEN SYSTEMC INITIATIVE DELIVERS SYSTEMC V2.0 SPECIFICATION AND V1.2 BETA OPEN SOURCE CODE.
New Cadence Incisive Verification Platform Compresses Overall Verification of Nanometer-Scale Designs by up to 50 Percent.
Cadence Incisive verification platform. (IT News).
Cadence launches single-kernel verification platform. (Hot wires: news just off the press).
CoWare Introduces Management Team for Its New SPW Business Unit; Recently Transferred from Cadence Design Systems, SPW Business Extends CoWare's...
eInfochips Selects Cadence Incisive Verification Platform; Cadence Establishes Global Customer Connection with eInfochips in the Design Chain.
Cadence and CoWare Deliver Electronic System-Level -- ESL -- Design-for-Verification Flow; System-Level Design Knowledge Reduces Verification Effort...
Sonics Integrates Smart Interconnect IP with Cadence and CoWare Electronic System-Level -- ESL -- Design-for-Verification Flow.
Shanghai Research Center for Integrated Circuit Design and Cadence Introduce New CPU/DSP Core-Based Methodology for SoC Chips.
CoWare's Latest Software Release Aligns Strategic Technologies into Cohesive, Platform-Driven ESL Design Environment; Solutions Combine Tools, IP,...

Terms of use | Copyright © 2012 Farlex, Inc. | Feedback | For webmasters | Submit articles