Cadence and Agere Announce Strategic Alliance to Develop Chip I/O Planning Capability.

Business Editors/High-Tech Writers

D.A.T.E., MUNICH, Germany--(BUSINESS WIRE)--March 12, 2001

Cadence Delivers on SuperChip Initiative Bridging

Gap Between IC Design and IC Packaging Environments

Cadence Design Systems, Inc. (NYSE:CDN), the world's leading supplier of electronic design products and services, and Agere Systems, formerly known as the Microelectronics Group of Lucent Technologies (NYSE:LU), today announced the formation of a strategic alliance to develop chip input/output (I/O) planning capability. This technology alliance will lead to the development of a unique methodology that will promote the co-design of integrated circuits (ICs) and IC packaging to speed time-to-market. This methodology will help enable companies that design ICs and IC packaging, as well as those that supply IC/IC package/printed circuit board (PCB) solutions, to speed the design of the high-performance products demanded today. Today's announcement is one more element of the Cadence(R) SuperChip Initiative, the company's new long-term technology roadmap.

Cadence and Agere have teamed to develop this new technology, scheduled to be released in the fourth quarter of 2001, to help close the gap in the design flow between IC design and IC packaging environments.

When used with Cadence's Advanced Package Designer and Advanced Package Engineer tool suites, it will advance the design process to the next level of silicon-package-board integration. Cadence is leveraging Agere's existing intellectual property (IP) to develop this new methodology. Agere Systems, the world leader in semiconductors for communications applications, and the developer and manufacturer of optoelectronic components and integrated circuits, will provide feedback on product concept and effectiveness. "A better integration between IC and package physical design tools is key for successfully designing and manufacturing high-performance advanced products, in particular in wireless and wireline communications as well as in high pin-count applications," said Mark Pinto, vice president of the Platform Technology Organization at Agere Systems. "In this context, I/O planning is a critical task, and we are working closely with Cadence on its chip I/O planning capability in order to provide our customers with an effective solution." "We are proud that Agere chose to work with Cadence," said Mike Bosworth, senior vice president, Systems Solutions Business, Cadence Design Systems. "With its experience in high-speed design, Agere is an excellent ally in the co-development of this new technology. Working with Agere will enable us to reduce our development cycle and result in a more robust product."

Chip I/O Planning Technology

Optimizing placement of I/Os at the chip level, in the context of the packaging, is essential for the successful co-design of ICs and IC packaging. No complete solution for this is available in a commercial EDA tool today. As a consequence, most of today's design practices use methods that ar e time-consuming, have limited accuracy, and are overly conservative.

The Cadence/Agere alliance will employ physical feasibility and electrical analysis capability and will promote the communication between the silicon and packaging worlds with a two-way protocol between chip I/O planning and IC design tools.

"We had developed internal tools that promote the co-design of ICs and IC packaging," said Don Hawk, consulting member of technical staff for technology strategy at Agere Systems. "We were looking for an EDA company that could take that existing functionality and elevate it to the next level. Agere chose to align with Cadence because Cadence has expertise in IC, IC packaging, and PCB design tools."

"We are excited about the opportunity to work with Agere on developing this new technology," said Joel McGrath, marketing manager, advanced IC packaging technologies, Cadence PCB Systems Division. "The convergence of communication, computer, and multi-media technologies is driving time-to-market and performance metrics that cannot be met using traditional vertical design methodologies. This alliance enables Cadence to leverage Agere's experience and their internally developed chip I/O planning capability to create a product that will enable I/O floor planning at the silicon level in the context of the IC package."

The Joint Development Alliance

The agreement includes a contractual commitment by Agere to provide Cadence with engineering resources for a two-year period. Cadence will deliver to Agere functionality that is based on a jointly-developed product requirement specification. The new chip I/O planning technology will transcend two very different design environments, ICs and IC packaging, and therefore two very different markets. The alliance will enable Cadence to speed its development cycle, and make it the only EDA supplier that can offer a full design-link from IC to package to PCB. Agere will have first access to the software through co-development and beta testing.

In addition, Agere will avoid the costs associated with an internally developed tool.

About Cadence

Cadence is the largest supplier of electronic design automation products, methodology services, and design services used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products. The Cadence PCB Systems Division, a worldwide PCB EDA market leader, addresses the entire range of design needs in the PCB market, with complete tool suites available on Windows, Windows NT, and UNIX platforms. With approximately 5,400 employees and 2000 revenues of $1.3 billion, Cadence has sales offices, design centers, and research facilities located around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange under the symbol CDN. More information about the company and its products and services may be obtained from the World Wide Web at www.cadence.com.

About Agere

Agere Systems, formerly known as the Microelectronics Group of Lucent Technologies, is the world leader in semiconductors for communications applications. Lucent has announced it intends to spin off Agere Systems as an independent company. Agere Systems offers integrated optoelectronics and integrated circuits solutions to help customers reduce the time and expense of developing the new communications equipment. It also provides wireless computer networking solutions through its ORiNOCO product line. More information about Agere Systems is available from its Web site at http://www.agere.com.

Agere Systems safe-harbor statement:

This press release does not constitute an offering of any securities which will be made only by a prospectus filed with the U.S. Securities and Exchange Commission.

This release may contain forward-looking statements based on current information available to the company as of the date hereof that involve risks and uncertainties. The company's actual results could differ materially from those results stated or implied by such forward-looking statements due to risks and uncertainties. These risks and uncertainties include, but are not limited to, completion of the distribution of Agere stock by Lucent Technologies Inc., price and product competition, keeping pace with technological change, dependence on new product development, reliance on major customers and suppliers, customer demand for our products and services, availability of manufacturing capacity, components and materials, control of costs and expenses, general industry and market conditions and growth rates and general domestic and international economic conditions including interest rate and currency exchange rate fluctuations.