Cadence SP&R Technology Selected by Sun Microsystems for Complex ASICs.Business Editors/High-Tech Writers SAN JOSE San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. , Calif.--(BUSINESS WIRE)--April 29, 2002 Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services. http://cadence.com/. See also Verilog. , Inc. (NYSE NYSE See: New York Stock Exchange :CDN (Content Delivery Network) A system of distributed content on a large intranet or the public Internet in which copies of content are replicated and cached throughout the network. ) today announced that its SP&R (synthesis/place-and-route) design technology was selected by Sun Microsystems(R) Inc. (Nasdaq:SUNW SUNW Sun Microsystems, Inc (former stock symbol; now JAVA) SUNW Stanford University Network Workstation (Sun Microsystems, Inc) ) for use in the development of some of its largest, most complex application specific integrated circuits (ASICs). John Brennan, vice president, hardware engineering for the enterprise system products group, at Sun Microsystems said, "We evaluated Cadence(R) SP&R on several complex ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. designs and found that its integration of synthesis, placement, and global routing gave better results than our previous design flow. The tool provides an appropriate set of industry standard input and output files for handoffs with all of our ASIC vendors for this project. This physical synthesis tool should provide faster and more predictable timing closure and layout flows." With Cadence Physically Knowledgeable Synthesis (PKS PKS Penalty Kicks Saved (soccer; goalie save) PKS Partai Keadilan Sejahtera (Indonesia) PKS Phi Kappa Sigma (international male fraternity) PKS Pallister-Killian Syndrome ) and Silicon Ensemble(R)-PKS (SE-PKS) optimization place-and-route technologies, Sun Microsystems gets a design flow that supports a flat capacity of up to three million gates. The concurrent optimization engines in Cadence SP&R technology will allow Sun to optimize a design's logic, placement, and global routing, for improved overall tradeoffs, helping to ensure high quality results. "We are pleased that Sun Microsystems has chosen Cadence SP&R technology to meet their design needs," said Eric Filseth, vice president of SP&R marketing at Cadence. "Sun Microsystems' selection of Cadence SP&R reflects the tremendous market momentum for our integrated, front-to-back IC design solution." About Cadence Cadence is the largest supplier of electronic design technologies, methodology services, and design services. Cadence solutions are used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products. With approximately 5,600 employees and 2001 revenues of approximately $1.4 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange New York Stock Exchange (NYSE) World's largest marketplace for securities. The exchange began as an informal meeting of 24 men in 1792 on what is now Wall Street in New York City. under the symbol CDN. More information about the company, its products and services are available at www.cadence.com. Cadence, the Cadence logo, and Silicon Ensemble are registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners. Sun, Sun Microsystems and the Sun logo are trademarks or registered trademarks of Sun Microsystems, Inc. in the United States and other countries. |
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