Cadence Introduces Incisive Enterprise, Linking Multiple Specialists and Languages; Top Tier in Segmented Incisive Platform Combines VPA Technology and Methodology with e, SystemC, and SystemVerilog.SAN JOSE San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. , Calif. -- Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services. http://cadence.com/. See also Verilog. , Inc. (NASDAQ NASDAQ in full National Association of Securities Dealers Automated Quotations U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on :CDNS CDNS Cadence Design Systems, Inc (stock symbol) CDNS Climatological Data National Summary CDNS Command Data Network System CDNS Customer and Data Network Services (Sprint) ) today announced the Incisive Enterprise family of products, featuring enterprise-level verification process automation (VPA VPA Valproate VPA Vancouver Port Authority (Canada) VPA Virtual Population Analysis VPA Voluntary Partnership Agreement VPA Voluntary Placement Agreement VPA Volume Purchase Agreement VPA Vermont Principals' Association ) that supports e, SystemC and SystemVerilog. The new portfolio -- the top tier in the segmented Cadence(R) Incisive(R) functional verification Functional verification, in electronic design automation, is the task of verifying that the logic design conforms to specification. In everyday terms, functional verification attempts to answer the question "Does this proposed design do what is intended?" This is a complex task, platform -- reduces the growing predictability, productivity, and quality risks associated with complex SoC and systems development. In addition to the Incisive Enterprise family, which is tailored for multi-specialist SoC and system-development teams, Cadence offers the Incisive Design Team family, with verification solutions tailored for RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; development teams, and the Incisive HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. family, for HDL creation and simulation. The Incisive Enterprise family is part of a new set of Cadence offerings that integrates advanced "VPA-enabled" technologies and methodologies from the Verisity acquisition with system modeling, HDL and assertion languages, high-performance formal and dynamic engines, verification IP, and analysis tailored for each specialist. Incisive Enterprise targets the exponentially increasing complexity of the verification process associated with the integration of multiple specialists spanning block, chip and system-level verification of SoCs and hardware-software systems. "Cadence's Incisive Enterprise addresses the entire verification process from initial plan to verification closure," said Oliver Bell, director of system-on-chip verification at Micronas. "Our design and verification specialists require full solutions that support an optimal mix of languages such as e, SystemC, and SystemVerilog with a path towards system-level emulation." The Incisive Enterprise family provides new tools, technology and methodology to automate the verification process and includes: --Incisive Specman Simulator, a new product that includes a high-performance, direct kernel integration of the Incisive Simulator with block to system-level testbench automation from Specman Elite --Mixed SystemC and e transaction-based verification solution linking systems and verification specialists --Enterprise Manager, enhanced for enterprise use with integration to all Incisive engines, languages, and coverage tools --Incisive Palladium(R) hardware-assisted verification for specialists doing high-speed acceleration, HW/SW HW/SW Hardware/Software co-verification, system-level and post-silicon verification --Incisive Enterprise plan-to-closure productized methodology, combining widely adopted and mature reuse with proven transaction-level modeling Transaction-level modeling (TLM) is a high-level approach to modeling digital systems where details of communication among modules are separated from the details of the implementation of functional units or of the communication architecture. and system-level verification methodologies --Encapsulation of Incisive Design Team family of products and methodologies, including formal analysis and SystemVerilog support "As design and verification methodologies have become more complicated with the advent of SoCs and nanometer geometries, the leading-edge electronics companies have been forced to create teams of specialists. Each specialist requires a best-in-class solution tied together into an overall plan-to-closure methodology," said Moshe Gavrielov, executive vice president and general manager of the Cadence Verification Division. "Our customers require a process that is highly automated and managed with metrics for maximum visibility, predictability, resource utilization, productivity, and system-level quality." About Cadence Cadence enables global electronic-design innovation and plays an essential role in the creation of today's integrated circuits Integrated circuits Miniature electronic circuits produced within and upon a single semiconductor crystal, usually silicon. Integrated circuits range in complexity from simple logic circuits and amplifiers, about 1/20 in. (1. and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, printed-circuit boards and systems used in consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2004 revenues of approximately $1.2 billion, and has approximately 5,000 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com. Cadence, the Cadence logo, Incisive, Palladium, Specman Elite, and Xtreme are registered trademarks of Cadence Design Systems in the United States and other countries. All other trademarks are the property of their respective owners. |
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