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Cadence Incisive verification platform. (IT News).


The Cadence Incisive incisive /in·ci·sive/ (-si´siv)
1. having the power or quality of cutting.

2. pertaining to the incisor teeth.


in·ci·sive
adj.
1. Having the power to cut.
 verification platform, is the first single-kernel verification platform for nanometer-scale designs that supports a unified verification methodology for the embedded software Instructions that permanently reside in a ROM or flash memory chip. Embedded software may be immediately available to the CPU or, for faster execution, may be transferred to RAM first and then executed. , control, data path, and analog/mixed-signal/RF design domains. The new platform's unified methodology helps reduce testbench development time, verification runtime and debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits.  time, and can compress overall verification time by up to 50 percent. This enables an improvement in time-to-market for semiconductor customers, and accelerated system design-in of complex ICs for design chain partners.

The Incisive platform provides native support for Verilog, VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. , SystemC, the SystemC Verification Library, property specification language PSL/Sugar, algorithm development and Analog/Mixed Signal (AMS AMS - Andrew Message System ). It includes a combination of high-performance capabilities: an extensive transaction-level environment; fast, unified test generation; and Acceleration-on-Demand. www.cadence.com
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Publication:Database and Network Journal
Article Type:Brief Article
Geographic Code:1USA
Date:Apr 1, 2003
Words:125
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