Cadence First Encounter Selected for Worldwide Use in Leading ASIC Design Flow.Business Editors/High-Tech Writers SAN JOSE, Calif.--(BUSINESS WIRE)--Feb. 17, 2003 Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services. http://cadence.com/. See also Verilog. , Inc. (NYSE NYSE See: New York Stock Exchange :CDN (Content Delivery Network) A system of distributed content on a large intranet or the public Internet in which copies of content are replicated and cached throughout the network. ) announced that Texas Instruments (TI) has selected Cadence(R) First Encounter(R) physical prototype and placement system for use worldwide by its ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. team. TI will integrate First Encounter into its flow for application specific integrated circuit (ASIC) designs as the partitioning and time budgeting solution for complex, high-performance integrated circuits (ICs). TI also has integrated Cadence CeltIC(TM) into its ASIC design flow as the sign-off crosstalk glitch A temporary or random hardware malfunction. It is possible that a bug in a program may cause the hardware to appear as if it had a glitch in it and vice versa. At times it can be extremely difficult to determine whether a problem lies within the hardware or the software. See glitch attack. analysis tool, and completed qualification work of Cadence's 64-bit 4.0 NC-SIM for chip simulation, supporting both VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. and Verilog use for very large chip designs. "We have found the Cadence technology effective to address the unique challenges of nanometer process technologies," said Steve Sutton, vice president, TI ASIC. "We selected Cadence First Encounter because it simplifies the design of large chips. It is a key element of TI's state-of-the-art hierarchical design flow. With predictable control of partitioning and budgeting, we and our customers can significantly improve time-to-market with complex chip designs." Commenting on the announcement, Ping Chao, Cadence general manager, Digital IC Solutions, said, "The selection of our Encounter technology by TI highlights the unique ability of Cadence solutions to handle complex designs in advanced process technologies." About Cadence Cadence is the largest supplier of electronic design technologies, methodology services, and design services. Cadence solutions are used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics based products. With approximately 5,300 employees and 2002 revenues of approximately $1.3 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange New York Stock Exchange (NYSE) World's largest marketplace for securities. The exchange began as an informal meeting of 24 men in 1792 on what is now Wall Street in New York City. under the symbol CDN. More information about the company, its products and services is available at www.cadence.com. Cadence, the Cadence logo, and First Encounter are registered trademarks, and CeltIC is a trademark of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners. |
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