Cadence Enables Teradiant Networks to Expedite Development of New Network Processing Chipset; Cadence RTL Compiler Instrumental in Design of 200-Million-Transistor Chipset.Business Editors SAN JOSE San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. , Calif.--(BUSINESS WIRE)--May 14, 2003 Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services. http://cadence.com/. See also Verilog. , Inc. (NYSE NYSE See: New York Stock Exchange :CDN (Content Delivery Network) A system of distributed content on a large intranet or the public Internet in which copies of content are replicated and cached throughout the network. ), announced today that Cadence(R) RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; Compiler(TM) helped Teradiant Networks Inc. accelerate the development of its TeraPacket chipset A group of chips designed to work as a unit to perform a function. For example, a modem chipset contains all the primary circuits for transmitting and receiving. A PC chipset provides the electronic interfaces between all subsystems (see PC chipset for illustration). , which comprises a network processing engine and traffic manager. The more than 200-million-transistor chipset has been deemed to be among the densest semiconductors designed to date. It took Teradiant eight months to design TeraPacket(TM) using Cadence RTL Compiler, a high-speed, high-capacity tool for register transfer level (RTL) synthesis of multi-million-gate integrated circuits Integrated circuits Miniature electronic circuits produced within and upon a single semiconductor crystal, usually silicon. Integrated circuits range in complexity from simple logic circuits and amplifiers, about 1/20 in. (1. (ICs) targeting advanced foundry process technology. Cadence RTL Compiler's breakthrough global-focus algorithms enabled improved speed and die area, with significant enhancements in runtime and memory consumption over other market solutions. "Teradiant's work with RTL Compiler enabled the design of TeraPacket," said Satchit Jain, chief executive officer of Teradiant Networks. "RTL Compiler helped us meet the demand by networking equipment OEMs for high-ROI enabling semiconductors that will drive the growth of next-generation Internet routers (1) A router in the Internet that forwards IP packets between local, regional and national providers. Same as "IP router." (2) (InterNet Router) Macintosh software from Apple that internetworks different access methods (LocalTalk, EtherTalk, TokenTalk, etc. , multi-service switches and metropolitan switches. Teradiant's aggressive design goals led us to select Cadence as our design automation partner." "Having defined a chip architecture that delivers flexibility, high performance, and significantly reduced time-to-market, Teradiant Networks has demonstrated its leadership in the network processor segment," said Ping Chao, senior vice president and general manager of the Encounter platform at Cadence. "We are delighted that Teradiant worked with us to build this remarkable chipset." Cadence purchased RTL Compiler with its recent acquisition of Get2Chip. About Teradiant Networks Teradiant Networks develops and markets semiconductors that enable networking system manufacturers to build scalable switch and router platforms for next-generation networks. Analysts predict a sustainable compound annual growth rate of over 60% for these components, leading to projected industry revenues of over $1 billion by 2005. Teradiant chipsets are designed to overcome the performance, scalability and deployment limitations of today's network processors and of custom-designed ASICs used for packet processing and traffic management. In February 2001, Teradiant raised over $26 million in first-round funding from Menlo Ventures, Idanta Partners, Diamondhead Ventures, FBB FBB Female Body Builder FBB Fast Back-To-Back (Cisco) FBB Forward-Body Bias FBB From Backplane Buffer (Cisco) FBB Fury Balrog Blade (gaming) FBB Fiber Broadband Building , Compass Technology Partners, and private investors. For more information, visit www.teradiant.com or call 408/519-1700. About Cadence Cadence is the world's leader in electronic design technologies, methodology services, and design services. Cadence solutions are used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products. With approximately 5,200 employees and 2002 revenues of approximately $1.3 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange New York Stock Exchange (NYSE) World's largest marketplace for securities. The exchange began as an informal meeting of 24 men in 1792 on what is now Wall Street in New York City. under the symbol CDN. More information about the company, its products and services is available at www.cadence.com. Cadence, the Cadence logo and RTL Compiler are registered trademarks of Cadence Design Systems, Inc. All other trademarks or registered trademarks are the property of their respective owners. |
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