Cadence Enables Open Interoperability for Next-Generation IEEE Verilog.

Business Editors/High-Tech Writers

Design Automation Conference 2003

SAN JOSE, Calif.--(BUSINESS WIRE)--June 2, 2003

Cadence Design Systems, Inc. (NYSE: CDN)

Broad Technical Donation, Reference Implementation, and IEEE 

1364-2001 Support to Boost Verification Speed, Efficiency

In a move to enable open interoperability for next-generation IEEE Verilog(R), Cadence Design Systems, Inc. (NYSE: CDN) today announced an industry-first donation of comprehensive and portable Verilog language extensions to the IEEE, driven by customer requests. These include a universal testbench implementation for all IEEE 1364-compliant Verilog simulators. In addition, Cadence announced comprehensive support for the IEEE 1364-2001 standard within the Cadence Incisive verification platform.

"The IEEE's rigorous, open standards process led to Verilog IP interoperability that fostered a breadth of verification technology, IP exchange, and product innovation across the electronics industry," said Rahul Razdan, Cadence corporate vice president of Functional Verification. "The comprehensive delivery of Verilog 2001 in the Incisive platform demonstrates our clear commitment to open standards, through which we provide the best RTL design and verification solution to Verilog users worldwide."

"We are pleased that Cadence has responded to the IEEE Verilog Standards Group (VSG) call for donations," said Michael McNamara, chair of the IEEE 1364 Working Group. "We especially welcome the donation of proven technology directly to the Verilog Standard Group, as this will greatly increase the likelihood that parts of this technology will be included in the international standard, with general adoption by all players. My sincere personal hope is that other companies and industry consortia interested in advancing Verilog technology will follow the Cadence example, and work with the IEEE-1364 committee to build a single language. The significant contributions of industry consortia such as JEITA, the IEC, OVI and Accellera, as well those of companies like Synopsys, Cadence, Fintronic and ASC in working together on IEEE-1364 1995 and IEEE 1364-2001 have been instrumental to the success of these standards. I celebrate those who elect to follow these examples, to the benefit of all."

"As a leader in design and verification IP for memory and PCI Express, Denali depends on open interoperability to deliver IP efficiently throughout the design chain," said Kevin Silver, vice president of marketing, Denali Software, Inc. "We support Cadence and the IEEE in their continuing effort to drive the Verilog standard."

"Broadcom, a leading provider of highly integrated silicon solutions enabling broadband communications, designs and develops a variety of silicon products that implement many IEEE standards required and valued by our customers," said Steven Crain, Director of Library and Development for Broadcom. "We rely on Verilog for the development of our products and look forward to the advanced features currently being standardized by the IEEE. This donation from Cadence offers a risk-free method to try these advanced features in a vendor-neutral environment."

Universal Testbench Solution

As part of its donation, Cadence provided a testbench implementation as a functioning prototype for the IEEE and EDA product developers. The implementation will be available for free download as a Verilog Procedural Interface (VPI) binary library that can be used with any IEEE 1364-compliant simulator. Engineers now can develop advanced testbenches in Verilog, confident that their code will function consistently on all simulators.

About Incisive

The Cadence(R) Incisive(TM) verification platform is the world's first single-kernel verification platform that supports a unified methodology from system design to system design-in for all design domains. It delivers up to 100x full-chip performance throughout the entire design cycle, and compresses total verification time by up to 50 percent. The Incisive platform architecture natively supports Verilog, VHDL, SystemC, SystemC verification (SCV) standard, PSL/Sugar assertions, algorithm development, and analog/mixed-signal verification. With full transaction-level support, unified test generation, and Acceleration-on-Demand, the Incisive platform delivers the fastest, most efficient verification in the industry.

About Cadence

Cadence is the world's leader in electronic design technologies, methodology services, and design services. Cadence solutions are used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products. With approximately 5,200 employees and 2002 revenues of approximately $1.3 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange under the symbol CDN. More information about the company, its products and services is available at www.cadence.com.

Cadence, the Cadence logo, and Verilog are registered trademarks, and Incisive is a trademark of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.