Cadence Announces Sign-Off Status for Its NC-Sim Mixed-Language Simulator At ST Microelectronics.

Business Editors/High-Tech Writers

SAN JOSE, Calif.--(BUSINESS WIRE)--May 25, 2000

First Complete Mixed-Language Sign-off Capability for

ST Microelectronics; NC-Verilog Simulator Attains `Golden' Status

Cadence Design Systems (NYSE:CDN), the world's leading supplier of electronic design products and services, today announced that ST Microelectronics has certified the Cadence(R) NC-Sim mixed-language logic simulation technology as sign-off quality for its next-generation system-on-chip (SOC) designs. In addition, the Cadence NC-Verilog(R) simulator will replace the Verilog-XL(R) simulator as ST Microelectronics' in-house "golden" simulator. NC-Sim is Cadence's mixed-language simulator, NC-Verilog and NC-VHDL are single-language products employing Cadence's native-compiled technology.

The sign-off status for NC-Sim represents the first complete mixed-language (Verilog and VHDL) sign-off capability for ST Microelectronics. With this sign-off capability, NC-Sim offers designers a truly language-neutral solution that allows freedom of choice for their hardware description language (HDL) decisions. In addition, designers not only benefit from the sign-off accuracy of using Cadence's simulation technology for ST Microelectronics SOC designs, but also leverage the industry-leading performance and capacity inherent in the native compiled code approach, which is the basis of the NC-Sim technology. With NC-Sim's "golden" status at ST Microelectronics, VHDL users will also benefit from this highest level of certification given by a semiconductor vendor.

"In today's SOC design market there is no single HDL choice, design tools must be able to support both. We are impressed with the true-language interoperability and other advantages of the Cadence NC-Sim environment. With the NC technology, best in class performance and a very efficient memory utilization, we can deliver a truly effective way to reduce design cycles to our customers using 0.18 micron and 0.25 micron HCMOS processes," said Mr. Philippe Magarshack, group vice president at ST Microelectronics' CR&D. "The Cadence toolset offers the capabilities of a mixed-language, NC-based approach and our confidence is reflected in our own choice to use NC-Verilog as our golden simulator."

As more and more designers move to an SOC design style, the need to utilize multiple design representation formats has increased, requiring a design environment that supports the use of both Verilog and VHDL. In parallel, the complexity and size of SOC designs is dramatically increasing, requiring enhanced performance and capacity from simulation tools. Cadence's unique native compiled code approach provides HDL interoperability in a system that provides industry-leading throughput and capacity for even the largest designs. "ST Microelectronics has some of the most advanced designs and most sophisticated customers in the world. It is critical for them to provide a sign-off verification model that supports leading-edge SOC design," said Rahul Razdan, vice president of Design and Verification products at Cadence. "We are extremely pleased to continue the legacy of accuracy and confidence that Cadence has achieved over the years inside ST Microelectronics, and to bring the benefits of our next-generation simulation technology to them and their customers."

About Cadence

Cadence is the largest supplier of software products, methodology services, and design services used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products. With approximately 5,000 employees and 1999 annual revenue of $1.1 billion, Cadence has sales offices, design centers, and research facilities around the world. The Company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange under the symbol CDN. More information about the company, its products and services may be obtained from the World Wide Web at http://www.cadence.com.

Note to Editors: Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. Verilog-XL is a trademark of Cadence Design Systems, Inc. All others are properties of their holders.