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Cadence Affirma NC Simulator Leads With Up to Three Times Improvement in Simulation Speed; New Alliance Program Launched This Week at HDL Conference.


SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif.--(BUSINESS WIRE)--April 7, 1999--Cadence Design Systems, Inc. (NYSE NYSE

See: New York Stock Exchange
:CDN (Content Delivery Network) A system of distributed content on a large intranet or the public Internet in which copies of content are replicated and cached throughout the network. ) today announced it has increased the speed of its Affirma(TM) NC simulator for hardware description language (language) Hardware Description Language - (HDL) A kind of language used for the conceptual design of integrated circuits. Examples are VHDL and Verilog.  (HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. ) simulation and has introduced the Cadence(R) Performance Alliance Program.

As part of its on-going effort to solve system-on-a-chip (SOC) verification challenges, Cadence has refined the predictive event-scheduling algorithm of the Affirma NC Verilog simulator to improve the simulation performance of register transfer level (RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; ) designs. This enhancement, coupled with recent gate cruncher optimizations, has improved simulation time by an average of one and a half times for RTL-based designs and three times for gate-level designs as compared to the previous version of the simulator.

According to according to
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1. As stated or indicated by; on the authority of: according to historians.

2. In keeping with: according to instructions.

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 Dave Kelf, director of simulation products for Cadence, "These latest improvements give the Affirma NC simulator the fastest runtime performance in the industry for Verilog, VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction.  or mixed-language designs based on a series of competitive benchmarks conducted at customer sites since the beginning of 1999."

At Lockheed Martin For the former company, see .

Lockheed Martin (NYSE: LMT) is a leading multinational aerospace manufacturer and advanced technology company formed in 1995 by the merger of Lockheed Corporation with Martin Marietta.
 Electronics and Missiles, which develops advanced electronics for combat systems, the Affirma NC Verilog simulator has shown remarkable improvement over the earlier Verilog-XL Turbo simulator. Chinh Nguyen, senior ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  staff engineer at Lockheed Martin, has experienced exponential performance increases.

"The runtime speed of my simulation has increased by 50 times without any degradation in quality or reliability," reported Nguyen. "Our relationship with Cadence in implementing the Affirma NC Verilog simulator has been quite successful."

In an ongoing effort to maximize simulator performance and quality, Cadence has formalized for·mal·ize  
tr.v. for·mal·ized, for·mal·iz·ing, for·mal·iz·es
1. To give a definite form or shape to.

2.
a. To make formal.

b.
 the Performance Alliance Program. Through this program, Cadence customers can submit an actual design under strict non-disclosure to the Affirma simulation laboratory. These real-world designs will be used by Cadence engineers during product development to prioritize new performance optimizations and are added to the regression test suite to ensure quality of subsequent releases of the Affirma simulator products.

Kelf added, "Over the years, we have found the analysis of real customer designs to be the most effective method of improving our simulators. The Performance Alliance Program provides an opportunity for our extensive worldwide base of more than 2000 customers to work closely with us in ensuring the highest levels of performance and reliability for our simulators and their designs."

In return for participation in the program, the simulation performance of customer circuits will be maximized. Since their circuit becomes part of the Cadence regression suite, program participants will be assured of a high level of reliability in subsequent software releases. Participants are directly notified by Cadence when a specific release of the Affirma software yields a significant performance improvement for their circuit.

For more information about the Performance Alliance Program or to submit a circuit to the Affirma simulation laboratory, visit the Cadence booth number 102 on the floor of the HDL Conference at the Santa Clara Convention Center on April 7-8, 1999, or contact Steve Gendron at sjg@cadence.com.

Pricing and Availability

The Affirma NC Verilog simulator is available for Sun Microsystems and Hewlett Packard UNIX-based workstations. It is priced at $44,000 (U.S.) for a floating license or $35,200 (U.S) for a node-locked license.

About Cadence

Cadence is the largest supplier of software products, consulting services, and design services used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products. With more than 4,000 employees and 1998 annual sales of $1.2 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, and traded on the New York Stock Exchange New York Stock Exchange (NYSE)

World's largest marketplace for securities. The exchange began as an informal meeting of 24 men in 1792 on what is now Wall Street in New York City.
 under the symbol CDN. More information about the company, its products and services may be obtained from the World Wide Web at http://www.cadence.com.

Note to Editors: Cadence and the Cadence logo are registered trademarks, and Affirma is a trademark of Cadence Designs Systems, Inc. All other trademarks are the properties of their owners.
COPYRIGHT 1999 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 1999, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Geographic Code:1USA
Date:Apr 7, 1999
Words:659
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