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Cadabra Broadens Physical Synthesis Product Line, Makes Cell Library Design Fast and Cost-Effective.


SANTA CLARA Santa Clara, city, Cuba
Santa Clara (sän`tä klä`rä), city (1994 est. pop. 217,000), capital of Villa Clara prov., central Cuba.
, Calif.--(BUSINESS WIRE)--May 11, 1998--

Hierarchical Physical Synthesis Quickly Creates Macrocells and IO

Cell Layouts; Enables Chip Designers to Speed Up Cell Library

Design and Production

Cadabra Design Technology Inc. today announced the availability of two products that dramatically increase the productivity of designers creating layouts for macrocells and input/output (IO) cells used in the application-specific integrated circuit (hardware) Application-Specific Integrated Circuit - (ASIC) An integrated circuit designed to perform a particular function by defining the interconnection of a set of basic circuit building blocks drawn from a library provided by the circuit manufacturer.  (ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. ) and custom IC design process.

CLASSIC-MC(TM) creates handcrafted hand·craft  
n.
Variant of handicraft.

tr.v. hand·craft·ed, hand·craft·ing, hand·crafts
To fashion or make by hand.



hand·craft
 quality layouts for complex macrocells such as complex datapath bit cells, memory peripheral logic, and full-custom blocks.

CLASSIC-MC automatically partitions SPICE netlists into sub-blocks suitable for synthesis with CLASSIC-SC(TM), and then imports the leaf cells into a floorplan and connects them. CLASSIC-MC's hierarchical approach to physical synthesis enables designers to create much larger cells in a fraction of the time it takes to produce them by hand.

CLASSIC-IO(TM) is the first physical synthesis tool specifically targeted at IO cell design. CLASSIC-IO can be used by ASIC and IC vendors, third-party library companies, and customer-owned tooling (COT) foundries to synthesize To create a whole or complete unit from parts or components. See synthesis.  the layout of IO cells from a transistor-level SPICE netlist and an IO cell architecture. CLASSIC-IO extends CLASSIC-MC's hierarchical physical synthesis capabilities with IO-specific features and generators to speed IO cell development.

"Customers have been asking for a new level of automation to speed the layout of complex cells," said Martin Lefebvre, founder, president, and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board.  of Cadabra. "Now they can spend a few hours using Cadabra tools, generate cells quickly, and even explore alternate layouts with different characteristics."

Lefebvre continued, "IO cell layout is a specialized spe·cial·ize  
v. spe·cial·ized, spe·cial·iz·ing, spe·cial·iz·es

v.intr.
1. To pursue a special activity, occupation, or field of study.

2.
 skill. Typically a company has only one or two experts who spend several weeks entering polygons in a GDSII GDSII Graphic Design System II  editor or writing generator code. Physical synthesis leverages the specialized skills of these experts, enabling them to generate cells more quickly and customize IOs for special needs.

CLASSIC-MC supports user-defined constraints on cell dimensions and cross-cell routing tracks to support generating leaf cells with routing by abutment abutment /abut·ment/ (ah-but´ment) a supporting structure to sustain lateral or horizontal pressure, as the anchorage tooth for a fixed or removable partial denture.

a·but·ment
n.
 for datapath design. CLASSIC-IO can be used to generate IO cell layouts with different pitches from pad-limited to core-limited designs. Flip-chip pad styles are also supported. Both products enable users to explore alternate floorplans or architectures, and quickly generate new layouts.

Pricing and Availability

CLASSIC-MC and CLASSIC-IO are both currently in beta and will be available in July 1998. CLASSIC-MC is priced at $160,000 U.S. list, and CLASSIC-IO starts at $280,000 U.S. list.

About Cadabra(TM)

Cadabra was founded in 1994 to develop physical synthesis tools for the automatic creation of cells used in the standard cell, semicustom, and custom IC design process. Current customers include 10 of the 15 largest semiconductor vendors in the world, as well as leading fabless semiconductor companies A fabless semiconductor company specializes in the design and sale of hardware devices implemented on semiconductor chips. It achieves an advantage by outsourcing the fabrication of the devices to a specialized semiconductor manufacturer called a semiconductor foundry or "fab.  in the graphics and communications markets. For more information, visit the Cadabra Web site at http://www.cadabratech.com or send email to info@cadabratech.com.

CONTACT: Cadabra Design Technology Inc., Santa Clara

Emil Girczyc, 408/982-9446

emil@cadabratech.com

or

Lois Dubois PR Counsel, Portola Valley

Lois DuBois, 650/854-5485

ldubois@batnet.com
COPYRIGHT 1998 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 1998, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:May 11, 1998
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