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CYPRESS SAMPLING 18-MBIT SYNC SRAM FAMILY.


Cypress Semiconductor Corp. (NYSE NYSE

See: New York Stock Exchange
:CY), San Jose, has expanded its networking-optimized, 18-Mbit SRAM See static RAM.

SRAM - static random-access memory
 portfolio to include a variety of new options to better serve next-generation communications requirements. It is now sampling both the No Bus Latency(TM) (NoBL(TM)) and standard synchronous architecture SRAMs, targeting a broad range of networking and telecom segments, including wireless infrastructure (WIN), wide area networks (WAN), and storage array networks (SAN).

The pipelined and flowthrough versions of NoBL and standard synchronous devices are now available in 1024K x 18 and 512K x 36 configurations at 3.3-V and 2.5-V. The 2.5-V offering addresses the trend toward lower operating voltages. These parts consume less power than earlier-generation 5-V devices and are ideal for interfacing with the 2.5-V ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  devices used in the networking systems being developed today. The flowthrough versions of these devices support bus speeds up to 115 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. ; the pipelined versions support bus speeds up to 200 MHz. These 0.15-micron devices offer high density, low operating power and fast data transfer.

"The expansion of our 18-Mbit family provides Cypress a leadership position in synchronous, networking-optimized memories, strengthening significantly what has become a $200M a year business for us," said Tony Alvarez, senior vice president of Cypress's Memory Products Division. "Our expanded portfolio is a direct response to the needs of our strategic communications accounts, to whom we already provide a broad range of solutions in logic, timing technology, specialty memories, and physical-layer devices."

NoBL SRAMs have an architecture optimized for the most demanding high-speed applications requiring maximum bus bandwidth. They eliminate the latency (dead cycles, or wait states) found in conventional synchronous burst SRAM architectures when transitioning between write and read operations. The NoBL architecture allows data transfer on every clock cycle, regardless of whether a write or read operation is taking place, thereby providing 100% bus utilization. The standard synchronous architecture is used in many processor based systems, providing the Level 2 cache See L2 cache.

level 2 cache - secondary cache
 that is critical to system performance.

Product Availability

Samples of the various devices in the family -- including x18 and x36, 3.3 Volt, synchronous pipe SRAMs; and x18 and x36 NoBL and flowthrough synchronous SRAMs in 2.5V and 3.3V configurations -- are available now in standard 100-pin TQFP See QFP.  and 119-pin BGA (Ball Grid Array) A popular surface mount chip package that uses a grid of solder balls as its connectors. Available in plastic and ceramic varieties, BGA is noted for its compact size, high lead count and low inductance, which allows lower voltages to be used. . Pricing starts at $65.00 in quantities of 1,000. All Cypress synchronous and NoBL memories are 100% compatible with industry standards, providing customers with the security of multiple vendor support.

About Cypress

Cypress Semiconductor is "Driving the Communications Revolution"(TM) by providing high-performance integrated circuit solutions to fast-growing markets, including data communications, telecommunications, computation, consumer products, and industrial control. With a focus on emerging communications applications, Cypress's product portfolios include networking-optimized and micropower static RAMs; high-bandwidth multi-port and FIFO (First In First Out) A storage method that retrieves the item stored for the longest time. Contrast with LIFO. See traffic engineering methods.

FIFO - first-in first-out
 memories; high-density programmable logic devices; timing technology for PCs and other digital systems; and controllers for Universal Serial Bus See USB.

(hardware, standard) Universal Serial Bus - (USB) An external peripheral interface standard for communication between a computer and external peripherals over an inexpensive cable using biserial transmission.
 (USB USB
 in full Universal Serial Bus

Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer.
). Cypress is No. 1 in the USB and clock chip markets.

More than two-thirds of Cypress's sales come from fast-growing communications markets and dynamic companies such as Alcatel, Cisco, Ericsson, Lucent, Motorola, Nortel Networks, and 3Com. Cypress's ability to mix and match its broad portfolio of intellectual property enables targeted, integrated solutions for high-speed systems that feed bandwidth-hungry Internet applications. Cypress aims to become the preferred silicon supplier for Internet switching systems and for every Internet data stream to pass through at least one Cypress IC.

Cypress employs more than 4,500 people worldwide with international headquarters in San Jose, Calif. Its shares are listed on the New York Stock Exchange New York Stock Exchange (NYSE)

World's largest marketplace for securities. The exchange began as an informal meeting of 24 men in 1792 on what is now Wall Street in New York City.
 under the symbol CY.

For more information, visit http://www.cypress.com or call 800/858-1810 or 408/943-4885.
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Copyright 2001 Gale, Cengage Learning. All rights reserved.

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Comment:CYPRESS SAMPLING 18-MBIT SYNC SRAM FAMILY.
Publication:Electro Manufacturing
Geographic Code:1USA
Date:May 1, 2001
Words:606
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