COMPASS Announces First Standard Cell Library Technology Optimized For Synthesis, Place & Route And Power; Leverages COMPASS' Library Expertise for Next-Generation Deep Submicron Design.

SAN JOSE, Calif.--(BUSINESS WIRE)--March 18, 1996--COMPASS Design Automation, Inc., a leader in electronic design automation (EDA) software and libraries for deep submicron design, today announced a newly designed standard cell library technology, called the Optimum Silicon (OS) library technology, that is optimized for both synthesis and place and route tools. The new offering, which has over 300 standard cell functions, is aimed at deep submicron designs and provides significant improvements for area, power and performance that are achieved using single-height cells.

This technology is available under the Passport product line as Passport OS, as well as through the COMPASS Custom Library Development Program. This is the same COMPASS OS library technology that has been applied to the 0.35 micron Symbios and NEC custom libraries. The current Passport OS offering spans four technologies, including 0.6 micron (3V), 0.6 micron (5V), 0.5 micron (3V), and 0.5 micron (5V).

Subrao Shenoy, product manager for Passport libraries at COMPASS, stated, "To date, designers have had to forsake small die size for performance or vice versa in their deep submicron designs. Silicon area efficiency is measured in the absolute reduction of die size and not just gate counts. By developing this new OS library technology, for use with both synthesis and place and route tools, COMPASS has achieved a commercial cell set that offers designers unparalleled silicon area efficiency while still meeting their stringent power and performance requirements.

"As more customers move toward owning their own libraries," he continued, "advances in library design such as this will be critical so that their designs can meet high standards for density, speed, power and still be portable to all Passport foundries."

Optimized for Synthesis and Place and Route Tools

COMPASS' new OS library technology is unique in many aspects. The cell selection was carefully tuned to maintain a balanced set to address performance, density and diversity of cells for both combinational and sequential functions. It has been optimally implemented for synthesis and place and route tools, as well as for power.

While synthesis-optimized libraries offered a tremendous improvement in the past, the synthesis run times were large and required several loops with place and route tools for convergence on the design goals. Now, by considering the place and route effects, the cell architecture of the new OS library technology is optimized to "understand" the influence of a wide variety of industry standard routers and routed block sizes. For example, it can exploit "over the cell" routing, area connectors for cell port connections and handling of 45 degree angle geometries for highly efficient silicon area utilization.

The new library cells were carefully engineered by the COMPASS library development team. As with all COMPASS libraries, the OS library technology achieves a high degree of modeling accuracy and is closely correlated to silicon via testchip development efforts.

"The custom 0.35 micron library from COMPASS, which NEC is making available to customers such as Silicon Graphics, will allow designers to achieve higher levels of system integration on a single chip," stated Ichiro Fujitaka, general manager of the ASIC strategic business unit, NEC Electronics Inc.

NEC Electronics' advanced 0.35 micron cell-based library was detailed in a separate announcement issued today by the company.

According to Bill Wuertz, director, design tools and libraries at Symbios Logic, "We selected COMPASS as our partner for the Symbios Logic SYM9 cell library development because of its experience and expertise with deep submicron technologies. By working with COMPASS to develop our SYM9 0.35 micron library, based upon proven Passport cell-based technology, Symbios Logic will bring to the industry an ASIC offering optimized for extremely high density, high performance, and low power consumption."

This new OS library technology from COMPASS is tailored to address such applications as multimedia, wireless/telecommunications, networking and computer systems -- applications that require high performance and/or small die size. The low power emphasis makes it suitable for design of laptops and hand-held electronic devices.

Price and Availability

Passport OS libraries begin at $250,000 per library and are available now in 0.6 micron in 5-volt and 0.5 micron in 5-volt and 3- volt. The 0.6 micron in 3-volt will be available in early Q296. The 0.35 micron Passport OS product line will be announced in early Q296. Custom versions of the OS library technology are available now under the COMPASS Custom Library Development Program.

About COMPASS Design Automation

COMPASS Design Automation is a leading provider of electronic design automation (EDA) tools and libraries for designing deep submicron application-specific integrated circuits (ASICs) and application-specific standard products (ASSPs). The company supplies a complete set of tools for silicon implementation as well as front-end design and provides foundry flexible Passport and custom ASIC libraries, memory and datapath compilers, and library development tools. COMPASS is headquartered in San Jose, California, and develops, markets and sells its products worldwide. More information about COMPASS can be obtained on the World Wide Web by accessing http://www.compass-da.com. -0-

NOTE TO EDITORS: Passport and Passport OS are trademarks of COMPASS Design Automation, Inc. All other trademarks or registered trademarks are the property of their respective owners.

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