Printer Friendly
The Free Library
5,665,934 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

CAST Introduces SOC Kernels, Combining Essential IP Cores and Software for Easier System Development.


SANTA CLARA Santa Clara, city, Cuba
Santa Clara (sän`tä klä`rä), city (1994 est. pop. 217,000), capital of Villa Clara prov., central Cuba.
, Calif. -- Semiconductor intellectual property (IP) provider CAST, Inc. today described a new line of "SOC Kernels" aimed at developers of 32-bit System-on-Chip products.

These Kernels combine multiple IP cores for basic system functions with boot code, drivers, and other underlying software in a pre-integrated, pre-verified package. This provides a significant head start for complex systems, and, together with the designer's choice of 32-bit processor, is the quickest route to beginning actual hardware and software co-development. Because the designer need not select, integrate, and verify the essentials of a new system, starting with an SOC Kernel means a faster time to market and a lower development cost.

The SoC Kernel technology is processor agnostic and technology independent. SoC Kernels for a variety of processors and buses will be available; pricing starts at $8,000.

SoC Kernels are available in HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards.  source code, or as optimized netlists for specific FPGAs and structured ASICs. Additional IP cores and integration services are also available to further meet the needs of any particular customer.

An AMBA-based SoC Kernel for popular 32-bit processors is available today, and an ARM926EJ version of this SoC Kernel was recently announced in partnership with eASIC for their Nextreme device family.

The new SoC Kernels product line encompasses the pre-expanded PIP platform products already available from CAST for specific ARM processors, e.g., the PIP7-TDMI for ARM 7 family processes and the native TDMI TDMI Transportation Demand Management Institute
TDMI TD Securities Melbourne Institute
TDMI Thumb Instruction, Debugger, Multiplier, ICE (ARM CPU features)
TDMI Terence Detlef Max International
 bus. The SoC Kernels and PiPs are developed by CAST partner SoC Solutions, 32-bit system experts who have used the associated hardware and software to successfully develop systems for many customers over several years.

A custom SoC Kernal development board is available now, and further options for easier development and testing of SoC Kernel systems are expected over the next year. See the CAST website for more details at www.sockernels.com.

About SOC Kernels

Each SOC Kernel provides a skeleton system and starting point Noun 1. starting point - earliest limiting point
terminus a quo

commencement, get-go, offset, outset, showtime, starting time, beginning, start, kickoff, first - the time at which something is supposed to begin; "they got an early start"; "she knew from the
 for a particular 32-bit processor and main system bus. A Kernel serves as a completely integrated and verified platform, including the bus system, memory system, and basic peripherals.

An SOC Kernel includes the IP cores common to most 32-bit systems: interrupt controller, timers, interface for parallel inputs and outputs, address decoder A circuit that converts an address into the electrical signals required to retrieve the data from a memory cell, disk sector, cartridge library or other memory or storage device. , an internal memory controller (with a memory model), system bus interface elements, and a microprocessor interface.

Basic software functions in C or Assembly code are also provided so that an SOC Kernel is ready to use out of the box. These include a real-time scheduler, various drivers for peripheral devices, interrupt service routines (ISR (Interrupt Service Routine) Software routine that is executed in response to an interrupt. ), main code, basic boot code, and a hardware level programming interface (API (Application Programming Interface) A language and message format used by an application program to communicate with the operating system or some other control program such as a database management system (DBMS) or communications protocol. ).

SOCk System Development Boards

FPGA-based development boards offer the quickest way to start developing an embedded system Any electronic system that uses a CPU chip, but that is not a general-purpose workstation, desktop or laptop computer. Such systems generally use microprocessors, or they may use custom-designed chips or both.  with an SOC Kernel. These cost-effective boards implement the IP cores and run the software of a Kernel, and also provide elements including additional peripherals, memory and memory connectors, LCD display and VGA monitor An analog display screen that accepts VGA signals from the computer. See VGA and display adapter.  interfaces, USB ports, JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology.

JTAG - Joint Test Action Group
 interface, and a straight forward means to integrate the designer's custom logic. One example of a SOCk development board is that for the ARM926EJ[TM] processor offered by eASIC for their Nextreme[TM] structured device family.

About SoC Solutions, LLC (Logical Link Control) See "LANs" under data link protocol.

LLC - Logical Link Control
 

Founded in March 2000, CAST partner SoC Solutions is a team of embedded system engineers from VLSI Technologies, Philips, Motorola, Boeing, Rockwell and other companies with ARM-based experience going back to the ARM2 in 1986. Today they focus on creating state-of-the art system on chip development platforms, design reuse methodologies, and rapid development tools to service the fast-growing system-on-chip market. They work directly with processor manufacturers and system design houses, as well as providing innovative solutions and consulting design services for customers of CAST. See their web site for more information, www.socsolutions.com.

About CAST, Inc.

CAST provides over 100 popular and standards-based IP cores for ASICs and FPGAs. Privately owned and operating since 1993, CAST has established a reputation for high-quality IP products, simple licensing, and responsive technical support. The company is headquartered near New York City New York City: see New York, city.
New York City

City (pop., 2000: 8,008,278), southeastern New York, at the mouth of the Hudson River. The largest city in the U.S.
, partners with IP developers around the world, and works with select sales consultants and distributors throughout Europe and Asia.
COPYRIGHT 2007 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2007, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Date:Jan 30, 2007
Words:690
Previous Article:Arc-Intel Partners with Q4bis to Provide Business Intelligence Solutions Using the Q4bis BI Suite.
Next Article:CAST Expands Memory Controller Line with IP Core for DDR2 SDRAM Devices.
Topics:



Related Articles
Banyan announces second release of popular TCP/IP Internet applications suite; New release offers 32-bit Windows 95 support.
SiliconBackplane MicroNetworks Now Exceed 250MHz, End-to-End Performance Guarantees Speed Timing Closure; Sonics and Denali Attack Shared Memory...
Quickturn and Simutech Now Support ARM7TDMI on Common CoreBoard Delivery Vehicle.
Quickturn and Xilinx Partner to Expand Support for SOC Design Verification and Design Reuse.
Mentor Graphics and Xilinx Announce Availability of FPGA OpenMORE.
MIPS Technologies Partners with Synopsys to Provide DesignWare Users Easy Access to MIPS-Based SoC Design Environment.
Mentor Graphics Offers NewLogic Bluetooth Intellectual Property in Platform Solution.
Quickturn Announces IP Program to Provide High-Speed Hardware/Software Co-Verification Environment for SoC Designs.
Cadence Introduces Incisive Enterprise, Linking Multiple Specialists and Languages; Top Tier in Segmented Incisive Platform Combines VPA Technology...
CPU Tech and IBM Collaborate on New Class of Semiconductor Devices; Acalis(TM) Programmable Semiconductor Devices add Flexibility, Capacity and...

Terms of use | Copyright © 2009 Farlex, Inc. | Feedback | For webmasters | Submit articles