Printer Friendly
The Free Library
19,573,952 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

CARDtools Systems Enters the SOC Design Market With its High-Level Co-Design Environment.


Business Editors/High-Tech Writers

SANTA CLARA Santa Clara, city, Cuba
Santa Clara (sän`tä klä`rä), city (1994 est. pop. 217,000), capital of Villa Clara prov., central Cuba.
, Calif.--(BUSINESS WIRE)--May 30, 2000

NitroVP(TM) Builds a Virtual Prototype to Simulate Hardware and Software Together and Perform Trade-Off Analysis for Embedded and SOC

Applications Early in the Design Cycle

CARDtools, Inc., an EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board.  and embedded SOC design company, today announced that it has significantly upgraded its virtual hardware and software prototyping environment -- NitroVP -- for the co-design (HW/SW HW/SW Hardware/Software ) of SOC-based applications.

By using NitroVP designers can design and debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits.  the software and hardware of their embedded and SOC-based systems and make trade-offs among various software and hardware options, even for designs with multiple processors, in the same environment and early in the design cycle.

NitroVP evaluates the design's architectural decisions and options, and performs simulation of the entire SOC (both hardware and software together) to identify performance bottlenecks.

Joseph Rothman, CARDtools president, noted, "Architectural tools, like NitroVP, are being accepted by leading companies, so that designers can implement and verify their embedded and SOC designs quickly and efficiently, as well as early in the design cycle. Our customers' results have proven that co-design of hardware and software, and thus evaluating hardware versus software decisions early, results in a more efficient system."

CARDtools systems was recently selected for NEC' ACE-2 program, providing the next generation design methodology for SOC designs. (See related press release earlier this month.)

NitroVP's New Features

Nitro VP now offers both timing and functional modeling and high-speed simulation of the entire SOC design, a new integrated SOC debugger, language independent modeling (e.g., C or C++) and support for multiple processors and multiple instruction set simulators (ISS ISS

See Institutional Shareholder Services (ISS).
). Users can select from processor options or standard real-time operating systems (RTOS (1) (RealTime Operating System) An operating system designed for use in a real time computer system. See real time system, embedded system, process control and OS-9. ) as well as model power consumption and memory usage.

Who Uses Virtual Prototyping

Embedded system developers, who are designing printers, computer peripherals or designing for various multimedia, networking and wireless applications are among the users of NitroVP.

Price and Availability

NitroVP prices start at $75,000 (USD USD

In currencies, this is the abbreviation for the U.S. Dollar.

Notes:
The currency market, also known as the Foreign Exchange market, is the largest financial market in the world, with a daily average volume of over US $1 trillion.
) for Windows, Windows NT and Unix platforms. Version 6.0 ships in July.

About CARDtools

CARDtools, Inc. offers the world's first SOC Application Simulator and Virtual Design Environment. With it designers can review co-design tradeoffs, estimate software or hardware timing requirements, view buffer memory usage and obtain a general understanding of the overall design very early in the design process so problems can be detected and corrected early in the design cycle.

CARDtools Systems is located at 101 Metro Drive, Suite 250, San Jose, California San Jose (IPA: /ˌsænhoʊˈzeɪ/) is the third-largest city in California, and the tenth-largest in the United States. It is the county seat of Santa Clara County.  95110-1314 Tel: 408/894-9500. For more information query info@cardtools.com or visit www.cardtools.com.

Notes to editors: Graphics available on request.

Reader Service Information

CARDtools Systems is located at 101 Metro Drive, Suite 250,

San Jose, California 95110-1314 Tel: 408.894.9500. Son Baxley

or info@cardtools.com.

Acronyms and definition

EDA: Electronic Design Automation HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. : Hardware Description Language (language) Hardware Description Language - (HDL) A kind of language used for the conceptual design of integrated circuits. Examples are VHDL and Verilog.  HW/SW: Hardware/Software ISS: Instruction Set Simulator SOC: Systems-on-Chip RTOS: Real Times Operating System

NitroVP, SOC Debugger are trademarks of CARDtools Systems Corporation. All other trademarks and tradenames are the properties of their respective holders.
COPYRIGHT 2000 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2000, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Date:May 30, 2000
Words:510
Previous Article:LapLink.com Inc. and Fujitsu PC Corporation Extend Software Bundling Agreement.
Next Article:Walt Disney World Veteran Named Senior Vice President of Operations for Disneyland Resort.
Topics:



Related Articles
Verisity and Mentor Graphics Integrate Testbench Automation and Hardware/Software Co-Verification for System-on-Chip Designs.
STMicroelectronics and Synopsys Partner to Develop Next-Generation, C-Based System Level Design Solution for Complex Systems on a Chip.
Mentor Graphics and MIPS Technologies Unveil Complete Solution for Pre- to Post-Silicon SoC Development.
Synopsys' New Highest-Performance VHDL Simulator Expands Support for System Design and Verification.
Synopsys and Tensilica Partner to Provide New Cycle-Accurate Model Generation Platform.
New Quickturn Emulation and Prototyping Technology Delivers Breakthrough Performance, Productivity, and Flexibility for Verification of Complex Chips...
Denali Launches Databahn Memory Subsystem Generator; Databahn Automatically Generates Memory Controller Cores for New DRAM Technologies.
CARDtools Announces Shipments of High-Level Co-Design Environment For Systems-on-Chips; NEC Is Among the First New Customers to Receive NitroVP...
Toshiba discloses SoCMosaic custom chip IT co-development strategy.
Sigrity tool simulates chip, package.

Terms of use | Copyright © 2012 Farlex, Inc. | Feedback | For webmasters | Submit articles