Brion Collaborates with STARC on its Tachyon-Based Workflow.YOKOHAMA, Japan -- Brion Technologies, an ASML ASML Abstract State Machine Language ASML Anisotropic Shielded Microstrip Line company, in collaboration with Japan's Semiconductor Technology Academic Research Center (STARC STARC Semiconductor Technology Academic Research Center (Japan) STARC State Area Command STARC Student Alliance to Reform Corporations STARC Somerset Tackling Alcohol Related Crime STARC St. Albans Amateur Radio Club (St. ) will work to develop and test a complete design-for-manufacturing (DFM DFM Design for Manufacturing (newsletter) DFM Design for Manufacturability DFM Dubai Financial Market DFM Delphi Form (computer filename extension) DFM Distinguished Flying Medal DFM Diesel Fuel Marine ) workflow, enabled by Tachyon tachyon (tăk`ēŏn'), hypothetical elementary particle that travels only at speeds exceeding that of light. According to the theory of relativity, the speed of light is the limiting velocity for all ordinary material particles. , Brion's highly accurate and ultrafast optical proximity correction Optical proximity correction (OPC) is a photolithography enhancement technique commonly used to compensate for image errors due to diffraction or process effects. The two most common applications for OPC are linewidth differences between features in regions of different density (e. (OPC (1) (OpenGL Performance Characterization) A project group within GPC that manages OpenGL benchmarks. OPC endorses the Viewperf and GLperf benchmarks. Viewperf was created by IBM and OPC provides viewsets for it, which are combinations of tests using specific ), resolution enhancement technology
Resolution enhancement technology (RET) is a form of image processing technology used to manipulate dot characteristics popular among laser printer and inkjet printer (RET) and OPC verification system. This workflow will integrate Tachyon with EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. products from Brion alliance partners. Seven of STARC's 11 member companies will participate in the project, including use of the DFM workflow for production on their respective 65nm designs. "Working with Brion and its EDA partners is a natural next step for STARC, as we continue our mission of delivering proven methodologies to our member companies," said Nobuyuki Nishiguchi, vice president, general manager, development department-1 of STARC. "Most of STARC's member companies are already Brion customers and Tachyon users. They naturally want to use the same accurate, production-qualified lithography models created by Tachyon along their entire process flows, from design to mask making to manufacturing." Chipmakers are paying increasing attention to DFM as device designs continue to shrink from Verb 1. shrink from - avoid (one's assigned duties); "The derelict soldier shirked his duties" fiddle, shirk, goldbrick avoid - refrain from doing something; "She refrains from calling her therapist too often"; "He should avoid publishing his wife's 65nm geometries to 45nm and then 32nm. With each generation, on-mask circuit patterns become increasingly complex because of the need for OPC and other resolution enhancement technology (RET) to ensure that subwavelength features are transferred correctly onto silicon. To achieve efficient and cost-effective OPC, it is critical to have accurate, high-speed simulation that verifies both design and OPC data in advance of the costly mask production process. By creating lithography-aware designs using Tachyon's computational lithography capabilities integrated with Brion's EDA partners, participating STARC members will be able to achieve not only cost-effective design accuracy, but an increase in both parametric and catastrophic yield. "Having a lithography-aware design flow that correlates well to both mask making and device production is essential at the 65nm node and beyond," said Shauh-Teh Juang, Brion's senior vice president of marketing and business development. "Multiple and inaccurate models can be avoided. Furthermore, incorporating computational lithography into the entire production flow can optimize runtime and mask costs while minimizing variability in the device design at each stage, from design verification to production. We're very pleased to be working with STARC, helping bring lithography-aware DFM to their members' design and production flows." About Tachyon Tachyon is a hybrid computational lithography system used to perform OPC and verify RET/OPC through full chip simulation using a combination of image-based lithography processing and polygon-based data processing data processing or information processing, operations (e.g., handling, merging, sorting, and computing) performed upon data in accordance with strictly defined procedures, such as recording and summarizing the financial transactions of a . Earlier this year Brion unveiled Tachyon 2.0, the second-generation of this widely used computational lithography platform. Designed for the Lithography-Driven Design & Manufacturing(TM) challenges of the 45nm and 32nm nodes, Tachyon 2.0 offers a 4x increase in modeling power and a significant speedup in optical proximity correction (OPC) and OPC verification. About STARC The Semiconductor Technology Academic Research Center (STARC) is a research consortium co-founded by major Japanese semiconductor companies in December 1995. STARC's mission is to contribute the growth of the Japanese semiconductor industry by developing leading-edge SoC design technologies. The consortium's current members are 11 of Japan's top IC companies. About Brion Technologies Brion Technologies is an ASML company and industry leader in computational lithography for integrated circuit integrated circuit (IC), electronic circuit built on a semiconductor substrate, usually one of single-crystal silicon. The circuit, often called a chip, is packaged in a hermetically sealed case or a nonhermetic plastic capsule, with leads extending from it for Lithography-Driven Design and Manufacturing[TM]. Brion's Tachyon[TM] platform, an optical proximity correction (OPC) and OPC verification system, enables capabilities that address chip design, photomask making and wafer printing for semiconductor manufacturing. Brion is headquartered in Santa Clara, California Santa Clara, California (IPA: /ˌsæntəˈklærə/) , founded in 1777 and incorporated in 1852, is a city in Santa Clara County, in the U.S. state of California. . For more information: www.brion.com or www.ASML.com. (c) 2007 Brion Technologies Inc. All rights reserved. Brion Technologies, the Brion Technologies Logo, Lithography-Driven Design & Manufacturing, and Tachyon are trademarks of Brion Technologies, Inc. |
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