Bluespec Executives to Speak at Electronic System Level Design Workshop 2007.Presentations to Detail Low Power, Design by Refinement WALTHAM, Mass. -- Bluespec continues its high profile in India in 2007 as its executives make electronic system level (ESL (1) An earlier family of client/server development tools for Windows and OS/2 from Ardent Software (formerly VMARK). It was originally developed by Easel Corporation, which was acquired by VMARK. ) design presentations at the Electronic System Level Design (ESLD ESLD End Stage Liver Disease ) Workshop 2007 to be held January 11-12 in Bangalore. R. Nikhil, chief technology officer, will offer "Design by Refinement" in a presentation scheduled for Thursday, January 11. This speech outlines an ESL methodology that starts at an executable specification for the design and successively refines it into ESL implementation with the automatic generation of register transfer level (RTL) code. Dr. Nikhil will use a small routing switch as an example for his talk. Vice President of Engineering Charlie Hauck will offer "Automated Fine Grain Low Power Design Techniques" in a presentation also scheduled for January 11. His presentation details the ways in which ESL can automatically add State Retention Power Gating and operand The part of a machine instruction that references data or a peripheral device. In the instruction, ADD A to B, A and B are the operands (nouns), and ADD is the operation code (verb). In the instruction READ TRACK 9, SECTOR 32, track and sector are the operands. isolation among other techniques for lowering power consumption. Shiv shiv n. Slang A knife, razor, or other sharp or pointed implement, especially one used as a weapon. [Probably Romany chiv, blade.] Noun 1. Tasker, Bluespec's chief executive officer, is moderating a discussion titled, "ESLD in India: Opportunities and Challenges," to be held Friday, January 12. Additionally, Bluespec is showcasing this week its products and Morphing Machine's HD H.264 design at VLSI VLSI: see integrated circuit. (1) (Very Large Scale Integration) Between 100,000 and one million transistors on a chip. See SSI, MSI, LSI and ULSI. (2) (VLSI Technology, Inc., Tempe, AZ, www.semiconductors. 2007 (Booth #20) also in Bangalore. Details about the ESLD Workshop are found at: http://vlsi_india.tripod.com/vsi/activities/esld07_blr/index.shtml For more details on Bluespec, contact George Harper, vice president of marketing, who can be reached at (781) 250-2200 or via email at george.harper@bluespec.com. Or, visit the Bluespec website located at: http://www.bluespec.com. About Bluespec Bluespec Inc. manufactures an industry standards-based Electronic Design Automation (EDA) toolset that significantly raises the level of abstraction The level of complexity by which a system is viewed. The higher the level, the less detail. The lower the level, the more detail. The highest level of abstraction is the single system itself. for hardware design while retaining the ability to automatically synthesize high-quality RTL, without compromising speed, power or area. The toolset, the only one focused on control and complex datapaths, allows ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. and FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. designers to reduce design time, bugs and re-spins that contribute to product delays and escalating costs. More information can be found on www.bluespec.com or by calling (781) 250-2200. Copyright 2007 Bluespec, Inc. Bluespec is a trademark of Bluespec, Inc. All other brands, products or service names may be trademarks or service marks of the companies with which they are associated. |
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