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Bluespec Demonstrates FPGA-based Models and Testbenches at DAC.


Top Executives to Participate in High-Level Synthesis Workshop

WALTHAM, Mass. -- Bluespec[TM] Inc. will demonstrate a synthesizable model and testbench running at 35,000 times faster than event-based simulation and its new development workstation in Booth #2367 during the 45th Design Automation Conference (DAC See D/A converter and discretionary access control.

DAC - Digital to Analog Converter
). DAC runs June 8-13 at the Anaheim Convention Center Anaheim Convention Center is a major convention center in Anaheim, California. It is located across from the Disneyland Resort on Katella Avenue. Much of the Anaheim Convention Center has been renovated in recent years with state-of-the-art facilities.  in Anaheim, Calif.

Bluespec is the developer of the only general purpose high-level synthesis solution for synthesizable models, testbenches, control and algorithmic IP and System-on-Chip (SoC) interconnect. Its hardware demo, freed from the constraints of synthesizable RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences;  subsets, will show an FPGA-based implementation including hardware transactors, a synthesizable testbench, high-level models and AXI AXI Automated X-Ray Inspection (electronics)
AXI Association Xpertise Inc (Calgary, AB, Canada)
AXI Ada to X-Window System Interface
[R] bus components.

An additional highlight will be Bluespec's new Development Workstation for the design, analysis and debug of high-level models, testbenches and implementations.

Rishiyur Nikhil, Bluespec's chief technical officer, will present "From Executable Specifications to High-quality Implementations Using Bluespec," June 8th, from 9:00 a.m. - 9:20 a.m. at the workshop, "High-Level Synthesis: Back to the Future," in room 208A. Professor Arvind, Bluespec co-founder and board member, will present "HLS as an Enabling Technology: Some Complex Examples" from 1:30 p.m. - 1:50 p.m. at the same workshop.

Rishiyur Nikhil will also be chairing session 23, "Architectural and Precision Optimization in High-Level Synthesis" on Wednesday, June 11th, from 9:00A-11:00A in room 210AB.

Collocated at DAC, Professor Arvind and Rishiyur Nikhil will be giving a tutorial entitled "Hands-on Introduction to BSV (Bluespec SystemVerilog)" on Saturday, June 7, 2008, in room 303B of the Anaheim Convention Center in Anaheim, CA. Details and registration for the tutorial are provided on the MEMOCODE MEMOCODE Conference on Formal Methods and Programming Models for Codesign  2008 conference website at: http://svl1.cs.pdx.edu/memocode08/.

Contact Bluespec's Vice President of Marketing George Harper to schedule a demonstration. He can be reached at (781) 250-2200 or via email at george.harper@bluespec.com.

About Bluespec

Bluespec Inc. manufactures an industry standards-based Electronic Design Automation (EDA) toolset that significantly raises the level of abstraction The level of complexity by which a system is viewed. The higher the level, the less detail. The lower the level, the more detail. The highest level of abstraction is the single system itself.  for hardware design while retaining the ability to automatically synthesize high-quality RTL, without compromising speed, power or area. Elevating System-on-Chip (SoC) modeling, verification and implementation with atomic transactions, the only high-level abstraction for hardware concurrency Operations that are performed simultaneously within the computer. For example, dual-core CPUs provide complete overlapping of two independent processes. See dual core, hyperthreading, multiprocessing, multitasking, multithreading, SMP and MPP.

concurrency - multitasking
, the general purpose toolset allows ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  and FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market.  teams to reduce development time, bugs and re-spins that contribute to product delays and escalating costs. More information can be found on www.bluespec.com or by calling (781) 250-2200.

Copyright 2008 Bluespec Inc. Bluespec and AzureIP are trademarks of Bluespec Inc. All other brands, products or service names may be trademarks or service marks of the companies with which they are associated.
COPYRIGHT 2008 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2008 Gale, Cengage Learning. All rights reserved.

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Publication:Business Wire
Date:Jun 3, 2008
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