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Bit Error Rate Tester Chip from Dallas Semiconductor Smallest, Lowest Cost Way to Test Telecommunications Equipment; Eliminates Need for External Test Equipment.


DALLAS--(BUSINESS WIRE)--July 15, 1996--Dallas Semiconductor today announced a low-cost, full-featured Bit Error Rate Tester (BERT (Bit Error Rate Test) An analysis of network transmission efficiency that computes the percentage of bits received in error from the total number sent. ) in a chip. The DS2172 generates pseudorandom pseu·do·ran·dom  
adj.
Of, relating to, or being random numbers generated by a definite, nonrandom computational process.
 or user-defined patterns needed to test telecommunications equipment.

Currently, this function is often performed by an external test box that must be set up by a field technician. Because the DS2172 works in conjunction with a microprocessor or microcontroller under software control, equipment can be tested remotely, without incurring the expense of the technician.

The DS2172 can be used in digital communication systems operating at speeds up to 52 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. . Applications include switching equipment, multiplexers, Routers, Bridges, CSUs, DSUs, and test equipment.

Said John DeChaud, product manager, "Including the DS2172 in a design provides an inexpensive, always-available resource for verifying local or remote equipment operation. Having this built-in test capability allows for quick isolation of bad network segments and equipment."

The DS2172 can be programmed to generate pseudorandom patterns with polynomial lengths up to 32 bits, including QRSS QRSS Quasi-Random Signal Source (Telecom)
QRSS Quasi-Random Signal Sequence
QRSS Quick Reaction Surveillance System
 or any user-programmable bit pattern from 1 to 32 bits in length. The device supports applications requiring gap clocking such as Fractional-T1 Switched-56, DDS (1) (Digital Data Storage) See DAT.

(2) (Data Dictionary System) See QuickBuild and OpenDDS.

(3) (Dataphone Digital S
, and per-channel testing. Error insertion capabilities include single or 10-1 to 10-7 bit error rates. Large 32-bit error count and bit count registers together with extensive interrupt capability facilitate software development. Pseudorandom and repetitive pattern generation conform to CCITT/ITU O.151, O.152, O.153 and O.161. The DS2172 is built using low-power CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes.  and requires a 5V supply.

Available immediately in a 32-pin TQFP See QFP.  package, the DS2172 Bit Error Rate Tester is priced at $5.30 each in quantities of 5,000.

Dallas Semiconductor (NYSE NYSE

See: New York Stock Exchange
: DS) designs, manufactures and markets CMOS chips and chip-based subsystems. In its 12-year history, the company has sold its products to more than 10,000 customers worldwide. These include Original Equipment Manufacturers (OEMs) in instrumentation, factory automation, personal computers, office equipment, telecommunications, medical equipment, and mainframe computers. Chips and subsystems are sold through a direct sales force, distributors and manufacturers' representatives worldwide. The company's Web site address is http://www.dalsemi.com

CONTACT: Readers' Contact

John DeChaud

Phone: 214/450-0448

Fax: 214/450-0470

or

Editors' Contact

Syd Coppersmith

Marketing Communications Manager

214/450-5349
COPYRIGHT 1996 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 1996, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:Jul 15, 1996
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