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Barcelona Design to Offer Analog IP for 90 nm Technology Node.


Business Editors/High-Tech Writers

NEWARK, Calif.--(BUSINESS WIRE)--Sept. 24, 2002

Barcelona Design Inc., the leading provider of synthesizable full-custom analog intellectual property (IP), today announced its plan to develop products at the 90 nm technology node See technology generation. . Taiwan Semiconductor Manufacturing Company (TSMC TSMC Taiwan Semiconductor Manufacturing Company, Ltd
TSMC Taiwan Semiconductor Manufacturing Corporation
TSMC Traffic Systems Management Center
TSMC Toll Station Management Controller
TSMC Transportation Supply Maintenance Command
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) -- the world's largest semiconductor foundry -- is expected to share technology information with Barcelona to support the development of analog intellectual property (IP) engines based on TSMC's Nexsys(TM) 90 nm process technology.

"The 90 nm process node is designed for System-on-Chip (SoC) products, which require analog IP customized to meet specific application requirements," said Peter Santos, Vice President of Marketing and Business Development at Barcelona Design. "Barcelona's revolutionary synthesizable analog IP offers the flexibility and performance SoC designers need to innovate and accelerate time to market."

Barcelona said that it would provide synthesizable analog or mixed signal components for analog functions such as phase-locked loops Phase-locked loops

Electronic circuits for locking an oscillator in phase with an arbitrary input signal. A phase-locked loop (PLL) is used in two fundamentally different ways: (1) as a demodulator, where it is employed to follow (and demodulate) frequency or
 and data converters designed to meet the requirements of SoCs targeted at the computing, communication and consumer segments. Barcelona intends to launch its first 90 nm product in the first half of 2003.

"Barcelona's initiative to develop IP targeted to TSMC's Nexsys 90 nm process allows us to cover a large application space very early in the lifecycle of this process technology. Barcelona's IP is expected to foster innovation and improve time-to-market for leading-edge SoC products," said Genda Hu, Vice President of Corporate Marketing at TSMC.

TSMC works extensively with industry-leading third-party IP providers to create the foundry industry's most comprehensive process-specific IP portfolio at technology nodes ranging from 0.25 micron to 90 nanometers. These process-proven cores provide designers with increased assurance of "right-the-first-time" silicon while reducing overall engineering and out-of-pocket expenses out-of-pocket expenses n. moneys paid directly for necessary items by a contractor, trustee, executor, administrator or any person responsible to cover expenses not detailed by agreement. . Without this service, many design engineers would have to develop their own IP or purchase custom cores, all of which considerably delays time-to-volume.

About TSMC

TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology and the foundry industry's largest portfolio of process-proven library, IP, design tools and reference flows. The company operates two advanced 300mm wafer fabs, seven eight-inch fabs and one six-inch wafer fab. TSMC also has substantial capacity commitments at two joint ventures fabs (Vanguard and SSMC SSMC Sound Shore Medical Center (New Rochelle, New York)
SSMC Sustainable San Mateo County
SSMC Symbology Standards Management Committee
SSMC Sungei Way Subang Methodist Church
SSMC Surveillance Strike Maneuver Capability
SSMC St.
) and at its wholly-owned subsidiary, WaferTech. In early 2002, TSMC became the first IC manufacturer to announce a 90 nanometer technology alignment Business and technology alignment, or just technology alignment, corrects terminology and assumptions used in business to better match those of technology and standards anticipated in the technology strategy and so-called technology roadmaps.  program with its customers. TSMC's corporate headquarters are in Hsin-Chu, Taiwan. For more information about TSMC go to http://www.tsmc.com.

About Barcelona Design, Inc.

Barcelona Design is the leading supplier of synthesizable full-custom analog IP, offering unique semiconductor intellectual property complemented by powerful design technology. Barcelona was founded in 1999 by CTO (Chief Technical Officer) The executive responsible for the technical direction of an organization. See CIO and salary survey.  Dr. Mar Hershenson and Stanford University Stanford University, at Stanford, Calif.; coeducational; chartered 1885, opened 1891 as Leland Stanford Junior Univ. (still the legal name). The original campus was designed by Frederick Law Olmsted. David Starr Jordan was its first president.  professor Dr. Stephen Boyd as a result of their research on the application of convex optimization Convex optimization is a subfield of mathematical optimization. Given a real vector space together with a convex, real-valued function

 mathematics to analog circuit analog circuit, electronic circuit that operates with currents and voltages that vary continuously with time and have no abrupt transitions between levels. Generally speaking, analog circuits are contrasted with digital circuits, which function as though currents or  design. The firm's analog circuit solution enables electronics companies to implement complex intellectual property (IP) instances radically faster than ever before. The company has proven its technology with working silicon, and has demonstrated market acceptance of its innovative approach by winning key customers, including Mitsubishi and ST Microelectronics. Barcelona has secured financing from leading venture capitalists including, Crosslink Capital, Sequoia Capital and Foundation Capital. The firm is headquartered in Newark, CA. For more information please visit www.barcelonadesign.com.
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Publication:Business Wire
Geographic Code:1USA
Date:Sep 24, 2002
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