BTA Technology Introduces DirectNode Test Chip Methodology to Enhance Verification of Deep Submicron Designs.SAN JOSE San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. , Calif.--(BUSINESS WIRE)--Aug. 23, 1999-- BTA (Business Technology Association, Kansas City, MO, www.bta.org). A membership association of manufacturers, dealers, distributors and service companies in the business equipment and systems industries, founded in 1994. Technology Teams Up With Mentor Graphics Mentor Graphics, Inc (NASDAQ: MENT) is a US-based multinational corporation dealing in electronic design automation (EDA) for electrical engineering and electronics, as of 2004, ranked third in the EDA industry it helped create. to Ensure Interconnect Modeling Accuracy BTA Technology, Inc., the company that provides innovative design solutions to ensure deep submicron performance, today introduced DirectNode(TM), an innovative test chip design methodology that enhances the predictability and performance of silicon behavior within complex, deep-submicron (DSM 1. DSM - Data Structure Manager. An object-oriented language by J.E. Rumbaugh and M.E. Loomis of GE, similar to C++. It is used in implementation of CAD/CAE software. DSM is written in DSM and C and produces C as output. ) designs. DirectNode enables electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) companies, integrated device manufacturers See IDM. (IDMs) and design engineers to achieve silicon-calibrated accuracy in the characterization of interconnect models for complex chip designs. In a collaboration believed to be the first of its kind in the EDA industry, BTA Technology and Mentor Graphics have teamed to extend the full-chip accuracy of Mentor Graphics' xCalibre(R) by using the DirectNode advanced interconnect modeling test chip. "The introduction of DirectNode reinforces our goal of helping designers achieve greater silicon accuracy for deep submicron designs," said Dr. Zhihong Liu, CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. and president of BTA Technology. "We are pleased to see that Mentor Graphics has successfully integrated DirectNode into their xCalibre interconnect modeling tool suite. By working together we are able to solve the critical problem of validating full-chip accuracy on real nets within complex deep submicron designs." DirectNode Technology DirectNode features a patent-pending methodology specifically designed to enable EDA tool developers to build real and verifiable silicon accuracy into their design verification toolsets. This innovative solution measures real capacitance capacitance, in electricity, capability of a body, system, circuit, or device for storing electric charge. Capacitance is expressed as the ratio of stored charge in coulombs to the impressed potential difference in volts. data from on-chip test structures which can then be used to build highly accurate models and lookup tables -- essential elements for creating a bridge between actual silicon capacitance values and those predicted by RC extraction tools. By utilizing these highly accurate models, a full-chip RC extractor, like Mentor Graphics' xCalibre, can predict exact capacitance values. Thus, engineers can accurately simulate full-chip timing. Ultimately, this means a better representation of signal integrity and timing which allows for greater engineering efficiencies and more successful complex design results. One notable element of DirectNode is that is accurate enough to measure very small capacitances (down to 0.01fF -- 100 times better than any other approach). The DirectNode test chip is also versatile enough to measure virtually any sort of interconnect patterns/geometries that could likely appear in actual designs. Mentor Graphics xCalibre Ensure Interconnect Modeling Accuracy Mentor Graphics has deployed the DirectNode test chip with its foundry partners to validate xCalibre's accuracy. Unlike other extraction tools, xCalibre offers an open design flow that enables integrated circuit integrated circuit (IC), electronic circuit built on a semiconductor substrate, usually one of single-crystal silicon. The circuit, often called a chip, is packaged in a hermetically sealed case or a nonhermetic plastic capsule, with leads extending from it for (IC) designers to partition a massive database of electronic circuit information on a net-by-net basis into manageable and isolated problems for analysis. xCalibre then accurately reintegrates the information back into the overall chip design. This unique approach offers linear scalability and maximizes performance. Michael McSherry, xCalibre marketing director, Mentor Graphics added, "In cooperation with BTA's Lab Services and top ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. foundries, we have developed a test chip that validates the superior accuracy of xCalibre. As a result, we have advanced our pioneering development in statistical worst-case performance prediction In computer science, performance prediction means to estimate the execution time or other performance factors (such as cache misses) of a program on a given computer. It is being widely used for computer architects to evaluate new computer designs, for compiler writers to explore . Incorporating the DirectNode methodology into our test chips helps ensure that our customers can accurately model interconnect structures within the most advanced deep submicron designs." The cornerstone of xCalibre's flow is based on Mentor Graphics' proven Calibre(R) hierarchical verification technology. The Calibre product family features hierarchical design rule checking (DRC DRC Democratic Republic of Congo DRC Down (Stage) Right Center DRC Director(ate) of Reserve Components DRC Disability Rights Commission (United Kingdom) ) and layout-versus-schematic (LVS LVS Linux Virtual Server LVS Live Vaccine Strain LVS Las Vegas, New Mexico (Airport Code) LVS Low Voltage Switchgear LVS Logistical Vehicle System LVS Laser Vibration Sensor LVS Logistics Vehicle System ), and is independent of design methodology implementation. Together, the two technologies provide a flexible and powerful infrastructure for managing and reusing massive quantities of data from various design views. Pricing and Availability BTA offers DirectNode through its lab services. Pricing of the services to develop a testchip begin at a U.S.-list price of $70K. DirectNode is also available for licensing. For license pricing contact BTA's sales force. xCalibre is available through Mentor Graphics, with pricing starting at $40,000. Additional information on Mentor Graphics xCalibre physical extraction product suite can be found on the Web at http://www.mentor.com/dsm/. About BTA Technology BTA Technology Inc. provides innovative design solutions to ensure deep-submicron performance. The company's simulation tools ensure first-silicon success by simulating the effects of hot-carrier and device mismatch mismatch 1. in blood transfusions and transplantation immunology, an incompatibility between potential donor and recipient. 2. one or more nucleotides in one of the double strands in a nucleic acid molecule without complementary nucleotides in the same position on the other on circuit performance. These effects become vital for achieving accuracy in today's designs, especially those with geometries of 0.18 micron and below. In addition to design tools, BTA offers a comprehensive line of modeling tools. These tools emphasize accuracy, ease of use, and tight integration of advance modeling capabilities for SPICE DC/AC, interconnect, RF, noise, and reliability model parameter extraction. Lastly, BTA provides complete consulting services through BTA Labs which is focused on solving modeling challenges for deep-submicron technology. The company is headquartered at 1982A Zanker Rd., San Jose, CA 95112, phone 408/451-1210, fax 408/451-1211, email info@btat.com, web http://www.btat.com. Note to Editors: BTA Technology and DirectNode are trademarks of BTA Technology. All other trademarks or registered trademarks are the property of their respective owners. |
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