BOPS Proves Performance/Power Leadership With Multi-Mode -- 802.11a and 802.11b -- Wireless LAN Solution in Silicon.Business Editors/High-Tech WritersMOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Nov. 5, 2001 BOPS New Mobile Wireless Processor Leverages BOPS(R) WirelessRay(TM) Core to Perform 802.11a and 802.11b PHY See physical layer and physical. Processing in Software while Consuming Only 300mW BOPS, Inc., the leading provider of programmable broadband digital signal processing See DSP. Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled). (DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive ) cores, today introduced its Mobile Wireless Processor (MWP MWP Medieval Warm Period MWP Microwave Photonics MWp Megawatt Peak MWP Maximum Working Pressure MWP Meteorologist Weather Processor MWP Mixed Waste Paper MWP Mid Wales Partnership MWP Mission Work Plan MWP Microwave Water Path MWP Metabolic Water Production ) created in TSMC's 0.13 micron 1.2v process. The evaluation chip builds upon BOPS power/performance leadership. It easily handles PHY processing for 802.11a, 802.11b, and HiperLAN/2 PHY processing with no compromise in power compared to fixed function alternatives. Jack Quinn, president, Micrologic Research, said, "With the wireless LAN industry about to splinter into several standards which will only be partially compatible with each other, wireless LAN chips will have to be programmable. BOPS(R) MWP and licensable WirelessRay(TM) DSP are excellent examples of products that address the need for programmable Wireless LAN devices with no compromise in cost or power." Micrologic Research estimates that 25 million wireless LAN nodes will ship worldwide in 2005. Central to the MWP evaluation chip is BOPS new low-power WirelessRay core, which is the first DSP core to compete head-on with single-mode wireless LAN fixed-function designs. "This changes everything," explained Ivan Greenberg, vice president, platform marketing. "In the past, fixed function ASICs were a no-brainer when developing wireless LAN baseband SOCs. With a die footprint of 6mm(2) and power consumption of 70mW, WirelessRay is the first DSP to deliver multi-mode PHY functionality at cost parity with fixed function alternatives. Device manufactures can finally have the best of three worlds -- flexibility of DSP, low cost/area ratio of fixed function and high performance/power ratio of fixed function." WirelessRay is a specific implementation of BOPS ManArray(R) multi-parallel architecture optimized for portable wireless LAN applications. Its Instruction Set Architecture (ISA (1) (Instruction Set Architecture) See instruction set. (2) (Interactive Services Association) See Internet Alliance. (3) (Internet Security and Acceleration) See .NET. ) has been extended to provide rich support for complex data type, acceleration of complex FFT/IFFT, flexible support for bit insertion/extraction, and smooth flow of byte wide data types. Owing to the wide architecture and extensive parallelism of the WirelessRay core, it is able to perform PHY layer processing for 802.11a, 802.11b, and HiperLAN/2. Additionally, BOPS Halo(TM) compiler, included in BOPS Software Development Kit (SDK (Software Developer's Kit) See developer's toolkit and Windows SDK. SDK - Software Developers Kit (or "Software Development Kit"). ) and bundled with the WirelessRay product, enables fast time-to-market of rock-solid multi-mode PHY software. (Halo, recently benchmarked by EEMBC EEMBC EDN Embedded Microprocessor Benchmark Consortium (Electronic Design News Magazine) -- http://www.eembc.org/benchmark -- set an industry record for optimized C performance in EEMBC's telecom benchmark suite.) The BOPS MWP was designed using industry-standard, low-power synthesis tools from Synopsys with custom-designed memories and register files. In addition to the WirelessRay DSP core, the chip incorporates 110kB of on-chip RAM, PCI (1) (Payment Card Industry) See PCI DSS. (2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus). I/F I/F Interface I/F Intermediate Frequency I/F Intermediate/Field I/F incident solar flux , SDRAM (Synchronous DRAM) A type of dynamic RAM (DRAM) memory chip that has been widely used since the late 1990s. SDRAM chips eliminated wait states by dividing the chip into two cell blocks and interleaving data between them. I/F, and SysAD bus, and delivers 6000 MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. of performance while consuming 300mW of power. The evaluation chip is available for licensing today and will be incorporated into BOPS Wireless LAN development platform, which will be available Q1 2002. BOPS customers can work with BOPS best-of-breed wireless LAN alliance partners to get shrink-wrapped multi-mode baseband SOC including 802.11a software, 802.11b software, physical design, and all hardware IP blocks associated with baseband processing. Customers who want more control can also take delivery of the WirelessRay core in Register Transfer Language Register Transfer Language - (RTL) 1. A kind of hardware description language (HDL) used in describing the registers of a computer or digital electronic system, and the way in which data is transferred between them. 2. (RTL) format. WirelessRay and MWP product briefs are available at http://www.bops.com. BOPS, Inc. offers flexible licensing options including multi-use, per-use and single-use licenses. About BOPS Based in Mountain View, Calif., BOPS, Inc. licenses and integrates scalable broadband DSP cores used in communications, mobile multimedia and wireless SOCs. BOPS offers a complete SOC prototyping environment for accelerated time to market, reduced risk, and ease of integration with ARM and MIPS. BOPS(R)-based SOCs are supported by an extensive alliance of hardware, software, and design partners. For more information, please visit: http://www.bops.com. Note to Editors: BOPS and ManArray are registered trademarks of BOPS, Inc. WirelessRay and Halo are trademarks of BOPS, Inc. All other brands or product names are the property of their respective holders. |
|
||||||||||||||

Printer friendly
Cite/link
Email
Feedback
Reader Opinion