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Avnet Design Services and Xilinx Announce First Programmable Development Platform For RapidIO Interconnect.


Business Editors/High-Tech Writers

PHOENIX--(BUSINESS WIRE)--July 23, 2002

Platform to Demonstrate the Xilinx RapidIO Solution

at Motorola's Smart Networks Developer Forum

and Xilinx Metro Optical Networking Communications between computers, telephones and other electronic devices using light. An optical network is far more reliable and has far greater potential transmission capacity than networking in the electrical domain. See optical fiber.  Forum

Avnet Design Services (ADS), the technical arm of Avnet Electronics Marketing, and Xilinx Inc. (Nasdaq: XLNX), Tuesday announced a new development kit for the RapidIO(TM) interconnect.

The development kit includes a PowerQUICC(TM) MPC (1) (Mobile PC) A handheld or laptop computer. See handheld computer, laptop computer and Ultra-Mobile PC.

(2) (MultiPath Channel) See multipath.
857T processor from Motorola and a Xilinx Virtex(R)-II Platform FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. , giving designers the flexibility to quickly and easily develop systems based on RapidIO interconnect technology -- accelerating the development cycle by as much as several months.

The RapidIO Interconnect Standard

RapidIO interconnect technology is a switched, high-speed, low-latency packet-based, point-to-point mezzanine bus for processors, memory and IO. RapidIO technology reduces pin counts, while staying full duplex (Computers) arranged so that the information may be transmitted in both directions simultaneously; - of communications channels between computers; contrasted with half duplex(a). , and uses LVDS (Low Voltage Differential Signaling) A transmission method for sending digital information. LVDS sends data over data high and data low lines rather than data and ground.  signaling.

The interconnect is optimized for the control plane for tightly coupled See tight coupling.  non-symmetrical multiprocessor systems with uniform memory characteristics, and enables tightly coupled systems Systems in which CPUs are connected together in such a way that they share some or all of the system’s memory and I/O resources. They are also called multiprocessor systems. References

  • Irv Englander (2003).
 using different types of microprocessors, microcontrollers and DSPs that require a low latency Low latency allows human-unnoticeable delays between an input being processed and the corresponding output providing real time characteristics. This can be especially important for internet connections utilizing services such as online gaming and VOIP - VOIP is not as important as  mechanism to access shared memory resources.

"Xilinx FPGA based hardware development kits, based on the Avalon(TM) reference design system, offer the quickest and easiest way for designers to get their designs done in record time," said Warren Miller, vice president of marketing for Avnet Design Services.

"The RapidIO interface standard is rapidly gaining acceptance and companies who want a time-to-market advantage over their competition will be able to use our new development kit to shave months off their design cycle."

"The availability of the RapidIO development kit underscores Xilinx's on-going commitment to provide our customers with the ultimate connectivity platform -- Virtex-II series FPGAs -- and interface solutions for tomorrow's communications and networking designs," said Babak Hedayati, senior director of Product Solutions Marketing and Partnerships at Xilinx.

"Demand for the RapidIO interconnect continues to grow, and with the large number of companies that are currently developing RapidIO-enabled solutions, there is a real need for a flexible platform to support their test and development efforts," said Raj Handa, director of PowerQUICC business development and technical marketing for Motorola's Networking and Communications Systems Division.

"The ADS Designed Motorola PowerQUICC MPC857T processor board, together with the FPGA development platform designed by ADS, meets this need -- and is designed to enable developers of RapidIO-enabled systems to get their solutions to market faster."

Avnet will demonstrate this RapidIO-based solution at Motorola's Smart Networks Developer Forum (SNDF SNDF Smart Networks Developer Forum
SNDF Smart Networks Developers Forum
), held in New Orleans from July 21 through 24. The company will also demonstrate the RapidIO solution on Thursday, July 25, 2002, at the Xilinx Metro Optical Networking Forum (MONF), held in Santa Clara, Calif. For complete MONF program information and to register now, visit www.xilinx.com.

Kit Description

The RapidIO Development Kit contains two Xilinx Virtex-II development boards, two Motorola 857T processor boards, the Xilinx Rapid I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output.

I/O - Input/Output
 Physical Layer Interface, complete design documentation, demonstration programs, and a board support package to simplify application development.

The RapidIO Development Kit can be ordered from Avnet Design Services as ordering part number ADS-XM-RIO-DEV and is priced at $30,000. Delivery time is 4 to 8 weeks. For more information on the development kit, visit www.ads.avnet.com/rapidio or www.xilinx.com/reference_design/avnet_rapidio.htm.

License Price and Availability for the RapidIO Core

The Xilinx RapidIO Endpoint Core (Xilinx RapidIO 8-bit Port Physical Layer core, and the Xilinx RapidIO Logical (I/O) & Transport Layer core) is fully compliant with RapidIO Interconnect Specification v1.1 and available now from Xilinx as LogiCORE(TM) products under the terms of the SignOnce(TM) license agreement.

Once purchased, they can be downloaded online at www.xilinx.com/rapidio. The site license for the 8-bit Port Physical Layer core is priced at $15,000 and for the Logical (I/O) and Transport layer core, $10,000. Both cores support Xilinx Virtex-II FPGAs using the latest ISE Ise (ē`sā), city (1990 pop. 104,164), Mie prefecture, S Honshu, Japan, on Ise Bay. It is one of the foremost religious centers of Shinto, the site of the shrines of Ise.  4.2i design software.

About Avnet Design Services

Avnet Design Services is the technical arm of Avnet Electronics Marketing, providing a variety of technical resources and capabilities to speed customers' design cycles and to get their products to market quicker.

Field applications engineers (FAEs) are knowledgeable about a variety of potential applications solutions for customers' design problems and can guide engineers to the solution that is right for their particular applications. Fee-for-service engineering services, in FPGA, ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  and System Design are offered to Avnet customers.

For more information, visit the Avnet Design Services Web site at http://www.ads.avnet.com.

About Avnet Electronics Marketing

Avnet Electronics Marketing (EM) is the largest operating group of Phoenix-based Avnet Inc. (NYSE NYSE

See: New York Stock Exchange
: AVT AVT

avian arginine vasotocin. See vasotocin.
) a Fortune 500 company with fiscal 2001 sales of $12.8 billion (year ended June 30, 2001).

One of the world's largest distributors of semiconductors, interconnect, passive and electromechanical The use of electricity to run moving parts. Disk drives, printers and motors are examples. Electromechanical systems must be designed for the eventual deterioration of moving components that wear over time. The first TVs were electromechanical systems (see video/TV history).  components from leading manufacturers, Avnet EM markets, inventories and adds value to these products and provides world-class supply-chain management and engineering design services. Avnet EM serves customers in 63 countries. The company's Web site is located at http://www.avnet.com.

Xilinx Reference Design Alliance Program

The Xilinx Reference Design Alliance Program builds partnerships with industry leading semiconductor and design companies to develop reference designs for accelerating our customers' product and system time-to-market. All reference design boards incorporate Xilinx devices and IP and are interoperable at the system level with other general and specialized semiconductor devices.

The reference design boards are ideal for a wide variety of digital electronic systems, including networking, communications, video imaging, DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive , and emerging market applications. For complete program information, visit www.xilinx.com/company/reference_design.

About Xilinx

Xilinx Inc. is the worldwide leader of programmable logic solutions. Additional information about Xilinx is available at www.xilinx.com.
COPYRIGHT 2002 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2002, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Date:Jul 23, 2002
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