Averant Closes $2M Round of Financing.Business Editors SANTA CLARA Santa Clara, city, Cuba Santa Clara (sän`tä klä`rä), city (1994 est. pop. 217,000), capital of Villa Clara prov., central Cuba. , Calif.--(BUSINESS WIRE)--March 27, 2002 Averant, the supplier of Solidify and the market leader in HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. property checking, has closed over $2M in second round financing. This round was lead by VenGlobal Capital Fund, the lead investor in Averant's first round of financing. In addition, several private investors participated including Saros Technologies Ltd., the distributor that represents Solidify in several European countries including the UK, Germany, and France. "VenGlobal first invested in Averant in 1999, and we have seen tremendous progress in Solidify and the market for property checking," said Phil Mak, VenGlobal Partner and member of Averant's Board of Directors. "We have witnessed first-hand at one of our portfolio companies huge benefits from using Solidify to verify HDL code as it is being developed. We are confident Averant will be the winner in this new market on the verge On the Verge (or The Geography of Yearning) is a play written by Eric Overmyer. It makes extensive use of esoteric language and pop culture references from the late nineteenth century to 1955. of exploding." "Saros has represented Solidify in the UK for over a year, and we are impressed and excited about Solidify as a product and its market opportunity," said Carey Sayer, Founding Director of Saros. Chris Rose This article is about the sports analyst; for the New Orleans Times-Picayune journalist with this name, see Chris Rose (journalist). Christopher Rose (born January 27, 1971) is an American sportscaster. , Founding Director, continued: "We believe property checking will impact verification the way syntheses impacted logic design. Solidify is impressing European customers, so we are increasing our investments in sales and support staff, expanding our territory to other parts of Europe including Germany and France, and participating in this round of financing. This investment in Averant gives Saros the opportunity to share in the value we are helping to create." About Averant Averant, Inc., founded in 1997, is a privately held EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. company leading the emerging market for static functional verification Functional verification, in electronic design automation, is the task of verifying that the logic design conforms to specification. In everyday terms, functional verification attempts to answer the question "Does this proposed design do what is intended?" This is a complex task, and property checking. Averant develops, sells, and supports worldwide Solidify, a software tool that delivers unprecedented performance in verification of HDL designs. Solidify improves verification productivity and design quality while reducing time-to-market and schedule risk. Over 25 companies have purchased Solidify, finding it easy to use and integrate into design flows so it provides a quick return on investment. For more information, visit Averant's web site at www.averant.com, or contact by email at info@averant.com or by phone at 408/844-8440. About VenGlobal VenGlobal Capital Fund invests in early-stage companies focused on software and communications. The best of class knowledge and first-hand experience of VenGlobal Capital Fund partners enable them to provide value-add to their investments of early-stage companies. For more information about VenGlobal, visit their web site www.venglobal.com. About Saros Technology Saros Technology is the foremost United Kingdom distributor of HDL tools. Founded in 1992, Saros offers a full suite of world-class VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. and Verilog design tools, from design-entry, simulation and synthesis to verification and training. Saros Technology has abundant experience and expertise in FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. and ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. design and provides customers with superior, comprehensive technical support. For more information about Saros Technology, visit their web site at www.saros.co.uk or telephone either 01491-837787 or 01462-476111. |
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