Averant Announces Sales Channel Expansion.

HAYWARD, Calif. -- Averant Inc., a leading provider of advanced verification technology for RTL designs, today announces the expansion of its sales channel in North America and Asia. Averant has signed two new representatives, Saphirus Inc. in Silicon Valley and CMR Design Automation in India.

"Averant's Solidify[TM] tools have long been the most popular property checking products in Japan," said Ramin Hojati, president of Averant. "It's time now to make Solidify the number 1 product in North America, as well as expanding sales and support in India and Singapore."

In Saphirus and CMR Design Automation, Averant gets two organizations with significant verification experience. Saphirus will bring their years of expertise selling functional verification methodologies in North America to the sales of Solidify. CMR Design Automation has been selling and supporting high-end EDA tools since 1992 and have 3 offices spread across India and one in Singapore. Like Saphirus, CMR brings to Averant years of expertise selling and supporting functional verification tools and methodologies.

Sanjay Bombwal of Saphirus commented that "We are very excited to be representing the Averant products. In addition to their well-known standing in Japan, their relationship with ARM, including having developed verification IP for the AMBA bus protocol, should enable larger static functional verification sales throughout the North American continent and especially Silicon Valley."

"India and Singapore continue to grow as key regions for EDA sales," according to Mahesh Chandra, co-founder and managing director of CMR Design Automation. "With Solidify's technology, including their patented static code coverage, and the continuing need for improvements in verification productivity and quality, we anticipate achieving great penetration in both indigenous and multi-national corporations in India and Singapore.

Both Saphirus and CMR Design Automation will sell the complete Solidify line, which includes the Solidify property checking engine, SolidAC[TM] for automated checking of common design issues such as clock domain crossing, dead code, finite state machine (FSM) deadlock and livelock, case statement pragmas, reset propagation, bus contention, X assignment propagation, and array out-of-bounds, and SolidPC[TM] for AMBA protocol verification. Solidify supports properties written in SVA, PSL and OVL; designs in Verilog and/or VHDL, and runs on Linux, Solaris and Windows platforms.

About Averant

Averant Inc., founded in 1997, is a privately held EDA firm pioneering new methodology and technologies for static formal verification. Averant provides Solidify, a robust formal verification engine that provides the basis for property-based design verification, protocol verification, timing constraint verification, and automatic design checks - all without the need for simulators or test vectors. These tools are easily adopted into the design flow, and help improve quality, reduce risk, and speed the design process. For more information, see our web site at http://www.averant.com.