Avant! Demonstrates Leadership in Deep Submicron IC Design at 33rd Annual Design Automation Conference.

LAS VEGAS--(BUSINESS WIRE)--May 31, 1996--Avant! Corporation will sponsor several events focused on deep submicron IC design at this year's Design Automation Conference (DAC) in Las Vegas, Nevada, June 3-6.

Breakfast Panel on Deep Submicron Technologies - Monday, June 3

To kick off DAC, Avant! will host a breakfast panel, "Getting Physical: Deep Submicron Technologies Drive the Revolution in Physical ICDA," on Monday, June 3, from 8:00 to 9:30 a.m., in Ballroom C at the Las Vegas Hilton. The panel will explore the capabilities ICDA tools need to handle deep submicron design, and will discuss the current strengths and limitations of today's design tools.

Ronald A. Rohrer of Carnegie Mellon will moderate the panel, which will include representatives from Sun Microsystems, Motorola, Compass, Viewlogic, Sematech and Avant!.

Avant! Press Luncheon and Presentation - Monday, June 3

The press and analyst community is cordially invited to join Avant! president Gerald C. Hsu and other Avant! executives for a luncheon and presentation of Avant!'s roadmap for success in deep submicron design. The luncheon will be held on Monday, June 3, from 12:00 noon to 1:30 p.m. in Conference Rooms 1 and 2 at the Las Vegas Hilton. Please RSVP to Patti Cardoza at 408/523-8961.

Avant! Night - Tuesday, June 4

Join Avant! and friends for cocktails and hors d'oeurves at the top of the world. The party will be held on Tuesday, June 4, from 5:30 to 7:30 p.m. at the Stratosphere Tower. Tickets will be available from Patti Cardoza at Avant!'s DAC Booth No. 1102.

Avant! DAC Booth Exhibition - No. 1102

At its 1996 DAC booth, Avant! will be demonstrating its Universe of deep submicron ICDA solutions featuring ArcCell, VeriCheck, and new physical design products introduced this year -- ArcCell-XO, Planet and Star.

ArcCell-XO is the industry's first hierarchical physical layout system developed specifically for the design of deep submicron ICs. ArcCell-XO incorporates Avant!'s proprietary, patented all-path timing-driven placement and routing technology. The benefits of ArcCell-XO include smaller die size, increased chip performance and increased designer productivity which results in faster time to market.

Planet is a floorplanner that meets market demand for faster, smaller, more complex IC designs. It provides IC design planning and analysis that enable users to quickly and accurately estimate IC performance and size early in the design cycle, saving many hours of design time and millions of dollars in IC development costs.

Star, a full-chip extraction, delay calculation and data reduction tool for IC physical design, analyzes the performance of deep submicron ICs including the most complex, high-performance microprocessors. Star is tightly integrated with Avant!'s hierarchical layout and verification tools, ArcCell and VeriCheck, to provide the most efficient, accurate and predictable performance possible for high-speed designs.

VeriCheck, Avant!'s hierarchical physical design verification system, speeds time to market with very fast run times on complex hierarchical IC designs. VeriCheck's DRC, ERC and LVS capabilities ensure that an IC's physical design matches its logical design and satisfies manufacturing rules.

Booth Demonstrations

Avant!'s booth will include the following demonstrations:

1. Floorplanning through verification & extraction showing smooth integration flow. Planet, ArcCell-XO, VeriCheck and Star extraction products will be used.

2. A microprocessor design application using ArcCell-BV, ArcCell-XO and Planet, showing Avant!'s timing-driven Synopsys link.

3. VeriCheck verification using HDRC, HLVS, VeriView and LTL.

4. A high-performance ASIC application highlighting Avant!'s extraction flow using filtering. Star extraction, filtering, data reduction and delay calculation products will be used.

5. A microprocessor design application using Avant!'s extraction flow with clock net analysis.

Multimedia Presentation

To both entertain and inform booth visitors, Avant! has prepared an interactive multimedia presentation that includes a product and corporate overview, company mission and goals, a financial overview and Avant!'s third-party vendor relationships.

As a tie-in to its Universal Solutions theme, Avant! will award a Meade telescope to a DAC attendee who can identify constellations shown on a display. One winner will be selected from those who correctly identify all the constellations after participating in a live presentation given by Avant! staff.

Avant! Suite

Avant! will host a demonstration suite for qualified customers at the Las Vegas Convention Center. All Avant! products will be shown, including the recently announced Solard physical optimization tool, and HPO, a high-performance option for Avant!'s successful ArcCell-XO place and route software. Using HPO, designers can achieve smaller, faster chips in a shorter amount of time than they could using traditional place and route software.

Solar optimizes the performance and shrinks the size of ICs to meet new deep submicron "golden file" needs. With Solar's accurate physical optimization, designers can reduce chip die size and achieve up to 40 percent faster IC performance in short runtimes on an engineering workstation.

To schedule a suite appointment, interested customers may call Maria Ochoa at 408/738-8881.

About the Company

Avant! Corporation (Nasdaq:AVNT) develops, markets, and supports integrated circuit design automation (ICDA) software for deep submicron ICs, microprocessors, microcontrollers, application-specific standard products (ASSPs) and complex application-specific integrated circuits (ASICs). As a 1996 Inc. 100 company, Avant! is one of the fastest-growing public companies in the U.S. Company headquarters are located in Sunnyvale, Calif. Telephone: [phone]. Web: http://www.avanticorp.com.

CONTACT: Avant! Corp.

Lois DuBois, 408/523-8857 or 408/406-4614

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Simon/McGarry Public Relations 

Carol Felton/Sandra McBride, 408/746-0911

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