Avant! Announces Solar, First Physical Optimization Tool to Meet New Deep Submicron "Golden File" Needs.SUNNYVALE, Calif.--(BUSINESS WIRE)--May 6, 1996--Avant! Corporation (Nasdaq:AVNT), the leader in deep submicron technology, today announced Solar, new design automation software that optimizes the performance and area of integrated circuits Integrated circuits Miniature electronic circuits produced within and upon a single semiconductor crystal, usually silicon. Integrated circuits range in complexity from simple logic circuits and amplifiers, about 1/20 in. (1. (ICs). Tests on actual IC designs show that with Solar's accurate physical timing optimization, designers can reduce chip die size and achieve up to 30 percent to 40 percent faster IC performance in short runtimes on an engineering workstation. Solar is the first physical optimization product to be tightly integrated with Avant!'s all-path timing-driven place and route system, ArcCell. The new product performs accurate timing and area optimization based on intelligence obtained during the placement and routing of an IC's physical devices. Solar produces smaller, faster chips than those created without the benefit of physical optimization, and enables designers to complete the physical design phase in less time. Solar also eliminates the tedious iterations required for a chip to achieve timing convergence. Solar includes a full featured built-in timing analyzer, all-path all-cell size optimization, and intelligent buffer and repeater insertion Repeater insertion is a technique for reducing the time delay associated with long wire lines in integrated circuits. The technique involves cutting the long wire into one or more short wires and inserting a repeater between each new pair of short wires. capabilities. The timing analyzer handles such functions as multi-clock, multi-phase, multi-cycle, false path, cycle stealing A CPU design technique that periodically "grabs" machine cycles from the main processor usually by some peripheral control unit, such as a DMA (direct memory access) device. In this way, processing and peripheral operations can be performed concurrently or with some degree of overlap. , and transparent latch. IC designers have a complete set of deep submicron hierarchical timing-driven design tools by combining Avant!'s all-path timing- driven floorplanner (Planet), all-path timing-driven place and route system (ArcCell), physical optimization (Solar), accurate full-chip extraction and delay analysis (Star), and hierarchical verification (VeriCheck). Price and Availability Solar, which will be demonstrated at the Design Automation Conference in Las Vegas Las Vegas (läs vā`gəs), city (1990 pop. 258,295), seat of Clark co., S Nev.; inc. 1911. It is the largest city in Nevada and the center of one of the fastest-growing urban areas in the United States. , Nevada, June 3-6, is expected to ship in the third quarter of this year. The software runs on engineering workstations from Hewlett-Packard and Sun Microsystems Sun Microsystems, Inc. (NASDAQ: JAVA[3]) is an American vendor of computers, computer components, computer software, and information-technology services, founded on 24 February 1982. . U.S. pricing begins at $125,000. Background Information With deep submicron process technology, interconnect delay between devices plays an increasingly important role in controlling IC performance. The traditional "gate delay dominant" logic timing optimization that designers perform during the logic design process is quickly becoming ineffective. Performing "interconnect delay dominant" physical timing optimization during the physical layout process is becoming the most effective way to create optimal designs with the best area and performance possible. This shift in the IC design paradigm Design paradigms are models, archetypes, or quintessential examples of designed solutions to problems. The term "Design paradigm" is used within the design professions, including architecture, industrial design and engineering design, to indicate an archetypal solution. has initiated a migration of the traditional golden netlist file from the front-end logical database to the new back-end "deep submicron golden netlist file." This migration is expedited as designs move further into deep submicron technologies. Avant! Corporation develops, markets and supports integrated circuit integrated circuit (IC), electronic circuit built on a semiconductor substrate, usually one of single-crystal silicon. The circuit, often called a chip, is packaged in a hermetically sealed case or a nonhermetic plastic capsule, with leads extending from it for design automation (ICDA ICDA abbr. International Classification of Diseases, Adapted for Use in the United States ) software for deep submicron ICs, microprocessors, microcontrollers, application-specific standard products (ASSPs) and complex application-specific integrated circuits (hardware) Application-Specific Integrated Circuit - (ASIC) An integrated circuit designed to perform a particular function by defining the interconnection of a set of basic circuit building blocks drawn from a library provided by the circuit manufacturer. (ASICs). Company headquarters are located in Sunnyvale, California Sunnyvale ([sʌniveil]) is a city in Santa Clara County, California, United States. It is one of the major cities that make up the Silicon Valley. As of the 2000 census, the city population was 131,760. , telephone 408/738-8881. World Wide Web site: http://www.avanticorp.com. -0- Note to Editors: Planet, Smart Extraction, Solar and Star are trademarks and ArcCell and VeriCheck are registered trademarks of Avant! Corporation. All other names are the property of their respective holders and should be treated as such. CONTACT: Avant! Corp. Lois DuBois, 408/523-8857 or 408/738-8881 lois_dubois@avanticorp.com |
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