Avant! Acquires Formal Verification Firm Chrysalis.
Avant! Corp snapped up one of the few remaining independent formal verification
In the context of hardware and software systems, formal verification tool companies yesterday with the acquisition of Chrysalis chrysalis (krĭs`əlĭs): see pupa. Symbolic Design Inc, on undisclosed terms. Design verification is becoming critical as integrated circuit integrated circuit (IC), electronic circuit built on a semiconductor substrate, usually one of single-crystal silicon. The circuit, often called a chip, is packaged in a hermetically sealed case or a nonhermetic plastic capsule, with leads extending from it for design gets more complex under the demand for system-on-a-chip designs . Avant! says the acquisition of Chrysalis' verification tools means that it now owns all the critical technologies needed to address next generation design verification.
North Billerica, Massachusetts-based Chrysalis owns a 64% share of the verification market with its Design Verifyer equivalence checking and Design Insight Model Setting tools, according to according to
1. As stated or indicated by; on the authority of: according to historians.
2. In keeping with: according to instructions.
3. Dataquest figures. Around 100 companies use the tools, including Advanced Micro Devices Inc, LM Ericsson AB, Fujitsu Ltd, Hewlett-Packard Co, IBM (International Business Machines Corporation, Armonk, NY, www.ibm.com) The world's largest computer company. IBM's product lines include the S/390 mainframes (zSeries), AS/400 midrange business systems (iSeries), RS/6000 workstations and servers (pSeries), Intel-based servers (xSeries) Corp, LSI LSI: see integrated circuit.
(Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI. Logic Inc, Sun Microsystems Inc and Texas Instruments Inc. Avant! plans to integrate the technology into its SinglePass design software, which combines logical and physical design.
All the mainstream electronic design automation companies have been moving verification technologies into their mainstream systems, mostly through acquisition. Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services.
See also Verilog. Inc launched its first verification tools in May 1998, and later in the year acquired the Bell Labs Design Automation unit from Lucent Technologies Inc. Earlier this year it acquired another verification firm, Design Acceleration Inc. And Cadence also acquired hardware based design emulation and verification company Quickturn Systems Inc this year, after a long battle with Mentor Graphics Corp. Mentor bought OPC (1) (OpenGL Performance Characterization) A project group within GPC that manages OpenGL benchmarks. OPC endorses the Viewperf and GLperf benchmarks. Viewperf was created by IBM and OPC provides viewsets for it, which are combinations of tests using specific Technology Inc in November last year. Synopsys launched its Formality tool in February 1998, and supplemented its existing Epic and Viewlogic acquisitions by buying verification company Systems Science Inc. IBM Corp also has its own formal verification department in Haifa, Israel, and its own Rulebase product line.
Small companies, however, have found it hard to put in the huge investments required to develop complex semiconductor design testing tools. Chrysalis' most direct competitor, Abstract Inc, failed last year despite a cash injection from Intel Corp. Other small companies still in the market include Fremont, California-based Verysys Electronic Design Automation Inc, Formalized for·mal·ize
tr.v. for·mal·ized, for·mal·iz·ing, for·mal·iz·es
1. To give a definite form or shape to.
a. To make formal.
b. Design, Inc of Chandler, Arizona, and Verplex Systems, Inc, a Santa Clara, California-based start-up.
The market is being driven by the new interest in systems-on-a-chip technology, which is leading to a "design gap" between the design process, now easily capable of fabricating parts with tens of millions of gates, and the verification process, which cannot cope with such huge numbers, so that mathematical testing methods are necessarily replacing the old methods of gate level simulation. Research has shown that there are already four to five engineers working on design verification to every one working on the design itself.