Attansic Selects Avery Design Systems for PCI Express Verification.

Business Editors/High-Tech Writers

ANDOVER, Mass.--(BUSINESS WIRE)--June 15, 2004

Avery Design Systems Inc., the leader in verification solutions for PCI Express(1), today announced that Attansic Technology Corp. has licensed Avery's PCI Express verification tools for the development of its next-generation chips.

Attansic engineers are using the PCI-Xactor PCI Express verification IP to simulate and verify the PCI Express interface of the next generation Attansic chips. The use of PCI-Xactor helps the Attansic team eliminate bugs at the pre-silicon stage at a much faster rate than they had anticipated, reducing time-to-market while having higher quality end products.

"Avery's verification framework has enabled us to bring up our endpoint testbench in a short time and begin exercising our design thoroughly using their compliance, error, and stress tests," said Arthur Wen, director of engineering of Attansic. "Their open source Verilog models and testcases provide an excellent environment to understand BFM operation and debug testcases running on our design. Avery has also exceeded our expectations for local support here in Hsin-Chu and Taipei."

About PCI-Xactor for PCI Express

The PCI-Xactor for PCI Express Verification Solution is a complete verification solution consisting of Bus Function Model (BFM), SuperMonitor, and test suites and verification frameworks for functional verification of PCI Express components. The PCI-Xactor allows design and verification engineers to quickly and extensively test the entire functionality of their PCI Express compliant devices. Verification frameworks form complete testbench environments for endpoint, switch, and bridge designs. Verification engineers just need to replace an Avery BFM with their design and begin running comprehensive verification tests. The PCI-Xactor environment leverages advanced verification techniques of Avery's TestWizard product supporting complex data structures, transaction database, random generation, temporal property checking, and coverage analysis.

Key Features

-- Verilog source code format for BFMs and testcases

-- Complete set of fully functional BFMs and testbenches for

every PCI Express component: Endpoints, Root Complex, Switch,

and PCI/PCI-X to PCI Express Bridge

-- Root Complex model provides the enumeration functions which

allows the designer to verify designs earlier to catch driver

setup problems

-- Support for serial, 10b-bit symbol, and PIPE interfaces.

-- Robust BFM API automates sending TLP/DLLP and controlling BFM

device response and link state

-- Inject errors and noise at various layers

-- Test suites include compliance tests from PCI-SIG, random,

error, and link-level stress tests

-- Test cases are self-checking, portable, and reusable on any

type of design

-- SuperMonitor verifies transaction ordering in N-port switch

and bridge designs

-- Native programming interfaces for Specman, Vera, C/C++

About PCI Express technology

PCI Express technology is the new industry-standard I/O targeted to provide local connectivity across desktop, mobile, enterprise and communications platforms. PCI Express resides at the center of enterprise interconnect innovations anticipated across storage, networking, and clustering and workstations. Next-generation servers, utilizing PCI Express technology, will offer powerful and cost-effective computing platforms, scalable hardware building blocks, market-tested best-of-breed solutions, and enterprise-class reliability, availability, serviceability and manageability.

About Avery Design Systems

Avery Design Systems Inc. is a supplier of functional verification products and service that enables dramatic productivity improvements of the ASIC-based systems and SOC verification process. Additional information about Avery Design Systems is available at http://www.avery-design.com.

(1) PCI-SIG, PCI Express, PCI, and PCI-X are either registered trademarks or trademarks of PCI-SIG in the United States and/or other countries. All other trademarks are the property of their respective owners.