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Atrenta and Aptix Partner to Deliver Predictive Analysis for Pre-Silicon Prototyping Platform; Streamlines SoC Integration and Verification.


Business Editors/High-Tech Writers

SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif.--(BUSINESS WIRE)--Oct. 20, 2003

Atrenta(R) Inc., the Predictive Analysis Company(TM), and Aptix, a leading supplier of pre-silicon prototyping (PSP (PlayStation Portable) See PlayStation. ) tools and platforms for embedded system-on-chip (SoC) design, have partnered to develop a set of RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences;  coding rules for pre-silicon prototyping that ensure efficient mapping to Aptix's multi-FPGA prototyping platform. The rule-set is made available as the Aptix Policy for Atrenta's SpyGlass(R) Predictive Analyzer.

Targeted for both design and verification engineers, the Aptix Policy for SpyGlass helps both groups follow best practices and ensure code compliance with design-for-prototyping principles. For designers it provides a comprehensive set of rules around which to efficiently code their RTL for FPGAs. For verification engineers it ensures that they are receiving clean RTL while providing in-depth design information. More of the verification engineer's time can be spent discovering real design bugs as opposed to FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market.  incompatibilities. The end result is a streamlined RTL-to-PSP flow, a more efficiently verified and validated SoC, and quicker time to market.

Atrenta worked directly with Aptix to define and test the most critical guidelines relating to relating to relate prepconcernant

relating to relate prepbezüglich +gen, mit Bezug auf +acc 
 the RTL-to-Prototype flow. Using the fast-synthesis and logic evaluation technologies of the SpyGlass platform, the Aptix Policy performs in-depth structural analysis on Verilog and VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction.  RTL to flag violations. After running a design through Spyglass, users can use Aptix's Logic Mapping software, Design Pilot(TM) to map their designs to Aptix's Reconfigurable PSP, System Explorer(TM), or to any standard PCB PCB: see polychlorinated biphenyl.
PCB
 in full polychlorinated biphenyl

Any of a class of highly stable organic compounds prepared by the reaction of chlorine with biphenyl, a two-ring compound.
 platform. Atrenta's first release of the Aptix predictive analysis solution is comprised of a set of rules that relate to FPGA synthesis compliance, successful Prototype versus Simulation comparison, and pertinent design information for verification engineers.

Charlie Miller, Aptix Sr. Vice President of Marketing & Business Development, said, "Aptix has more experience in pre-silicon prototyping than any other company. Part of our expertise is knowing the best way to design for prototyping. This new Aptix Policy for Atrenta's SpyGlass Predictive Analyzer captures that knowledge for use by our mutual customers."

"At Atrenta we are committed to solving our customers design productivity challenges," stated Ghulam Nurie, Atrenta's Sr. Vice President of Marketing & Business Development. "It is our strategy to address our customer's critical design issues as well as optimize their tool flow. By partnering with Aptix, we bring a set of new capabilities to help our mutual customers write pre-silicon prototype ready RTL from the start. This removes late stage RTL changes and enables a smooth transition from simulation to pre-silicon prototyping."

Availability

This Aptix policy is available now for use in SpyGlass 3.3 or later. It is sold and supported by Atrenta and its distributors. It runs on Sun/Solaris 2.5 - 2.8, HP-UX HP's version of Unix that runs on its 9000 family. It is based on SVID and incorporates features from BSD Unix along with several HP innovations.

(operating system) HP-UX - The version of Unix running on Hewlett-Packard workstations.
 10.2 and RedHat Linux 7.

About Aptix

Aptix Corporation is a leading provider of high-performance pre-silicon prototype (PSP) solutions to System-on-Chip (SoC) developers, enabling them to accelerate their time-to-market, reduce costs and improve their product performance. Aptix's reconfigurable and portable PSPs enable hardware developers to integrate custom logic and to verify and debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits.  complex SoC designs in a real-world environment and software developers to accelerate the firmware A category of memory chips that hold their content without electrical power. Firmware includes flash, ROM, PROM, EPROM and EEPROM technologies. When holding program instructions, firmware can be thought of as "hard software." See flash memory, ROM, PROM, EPROM, EEPROM and FOTA.  and application software development timeline. In addition, these flexible prototypes can be deployed for field-testing and to multiple customers for evaluation, providing a development head start. Visit Aptix on the web at http://www.aptix.com. Aptix is headquartered at 1338 Ridder Park Drive, San Jose, CA 95131.

About SpyGlass

SpyGlass(R) uses a unique predictive analysis technique to perform detailed structural analysis on Verilog and VHDL RTL in order to detect complex design problems early in the design cycle, resulting in reduced development costs, lower risk and early time to market. SpyGlass' fast-synthesis engine creates a structural representation of the design allowing the most comprehensive and accurate analysis of RTL to identify problems not normally visible in the RTL. Problems detected include clock domain crossings A clock domain crossing (CDC), or simply clock crossing, is when a signal crosses from one clock domain into another. If a signal does not assert long enough and is not registered, it may appear asynchronous on the incoming clock boundary. , synchronization (1) See synchronous and synchronous transmission.

(2) Ensuring that two sets of data are always the same. See data synchronization.

(3) Keeping time-of-day clocks in two devices set to the same time. See NTP.
, timing issues, testability problems, SoC integration requirements, RTL-handoff, design reuse, clock/reset requirements, and coding styles.

About Atrenta

Atrenta delivers predictive analysis solutions to the world's leading electronics companies, including eight of the top ten semiconductor companies. Its pioneering and award-winning SpyGlass Predictive Analysis tools accelerate the design of SoCs, ASICs, and FPGAs by detecting complex chip design problems that are not easily identified with conventional verification methods. During the past year, SpyGlass has been recognized with several distinguishing awards, including EDN EDN Endothelin
EDN Eosinophil-Derived Neurotoxin
EDN European Documentary Network (Denmark)
EDN Earth Day Network
EDN Electrodesiccation
EDN Electrical Design News (periodical) 
 magazine's Top 100 products for 2002 and "LSI LSI: see integrated circuit.


(Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI.
 Design of the Year 2002" award by Japan's Semiconductor Industry News. Atrenta was also chosen by Venture Reporter as one of the top 100 venture-backed companies for 2002 and recently named by AlwaysOn, as one of the Top 100 private companies.

Atrenta, with headquarters in San Jose, Calif., employs over one hundred people worldwide. It has European offices in England and France, a research and development center in India, and sales and support distributors in Central Europe Central Europe is the region lying between the variously and vaguely defined areas of Eastern and Western Europe. In addition, Northern, Southern and Southeastern Europe may variously delimit or overlap into Central Europe. , India, Israel, Japan, Korea, Singapore, Taiwan, and United Kingdom. For further information, visit the Atrenta website at www.atrenta.com, email moreinfo@atrenta.com, or call 408-453-3333. To view online demos, visit http://www.atrenta.com/demo.

Atrenta and SpyGlass are registered trademarks of Atrenta Inc. Aptix and System Explorer are registered trademarks of Aptix Corporation. All other trademarks belong to their respective owners.
COPYRIGHT 2003 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2003, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Geographic Code:1USA
Date:Oct 20, 2003
Words:877
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