Atrenta Announces University Technical Advisory Board.

International Researchers to Collaborate with Atrenta's Strong Technical Team on Strategic Initiatives

SAN JOSE, Calif. -- Atrenta Inc., the leading provider of early design closure solutions to radically improve design efficiency throughout the IC design flow, today announced the details of its University Technical Advisory Board (UTAB). The UTAB will collaborate with Atrenta's strong technical team on advanced product architectures and strategic initiatives.

Atrenta's UTAB members are distinguished and highly accomplished industry experts who provide strategic guidance on issues related to design solutions, technology trends and the latest research in SoC design and manufacturing. Their collective field of expertise spans system level design, embedded software development, low power design, synthesis, verification, physical design, timing and design for manufacturability. Beyond direct collaboration with UTAB members, Atrenta will also collaborate with selected universities in advanced research projects.

Atrenta's UTAB members are:

* Professor Robert Brayton (recent EDAC Kaufman Award honoree), Department of EECS, University of California, Berkeley, CA

* Professor Forrest Brewer, Department of ECE, University of California, Santa Barbara, CA

* Professor Anantha Chandrakasan, Department of EECS, Massachusetts Institute of Technology, Cambridge, MA

* Professor Tim Cheng, Department of Electrical and Computer Engineering, University of California, Santa Barbara, CA

* Professor Andrew B. Kahng, Departments of CSE and ECE, University of California at San Diego, La Jolla, CA

* Professor Massoud Pedram, Department of EE-Systems, University of Southern California, Los Angeles, CA

* Professor Sachin Sapatnekar, Department of ECE, University of Minnesota, Minneapolis, MN

* Professor Hyunchul Shin, School of Electrical and Computer Engineering, Hanyang University, Korea

* Professor Fabio Somenzi, Department of ECE, University of Colorado, Boulder, CO

"I am delighted to have such a talented and diverse group of researchers working with us," said Ajoy Bose, president and CEO of Atrenta. "I am confident that this group will make substantial contributions to Atrenta's product development strategy. We are looking forward to collaborating on advanced research as well."

About Atrenta

Atrenta is the leading provider of early design closure solutions to radically improve design efficiency throughout the IC design flow. Customers benefit from Atrenta tools and methodologies to optimize their designs early in the RTL phase for linting, clock domain crossings (CDC), power estimation and reduction, design for test (DFT), constraints generation and validation including timing exceptions, and RTL prototyping. Atrenta optimized RTL delivers up to 30% efficiency gains in chip integration, implementation and verification phases. Atrenta has over 130 customers, including the world's top 10 semiconductor companies. For more information, visit www.atrenta.com. Think Early Design Closure! Think Atrenta!

Atrenta and the Atrenta logo are registered trademarks of Atrenta Inc. All others are the property of their respective holders.

This press release contains forward-looking statements. Atrenta disclaims any obligation and does not undertake to update or revise the forward-looking statements in this press release.