Atmel licenses ARM926EJ-S Core for next-generation products.Atmel's SiliconCITY Chip Platforms and ARM926EJ-S Core Enable Sophisticated Systems-on-Chip with First Pass Success Atmel Corporation (Nasdaq:ATML ATML Automatic Test Markup Language ATML Automated Test Markup Language ) and ARM, (Nasdaq:ARMHY; LSE LSE - Language Sensitive Editor : ARM), the industry's leading provider of 16/32-bit embedded RISC RISC in full Reduced Instruction Set Computing Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s. microprocessor solutions, announced recently that Atmel has licensed the synthesizable ARM926EJ-S 32- bit RISC processor RISC processor [Reduced Instruction Set Computer], computer arithmetic-logic unit that uses a minimal instruction set, emphasizing the instructions used most often and optimizing them for the fastest possible execution. core for its next-generation system-on-chip (SoC) products. This agreement is the latest in a long-standing partnership between Atmel and ARM. Atmel was one of the first licensees of the ARM7 Thumb core family, and ARM core-based products are making a significant and steadily increasing contribution to Atmel's revenue stream. The ARM926EJ-S core will be implemented in a 130 nanometer process for a variety of standard and custom products. "The ARM926EJ-S core will be used by Atmel for both ARM core-based standard products and ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. implementations," said Alfredo Vadillo, Atmel's director for ASICs and ASSPs. "The synergy between standard products, ASSPs and ASICs is unique in the industry and forms the basis of our SiliconCITY strategy." "Atmel has experienced considerable success with ARM core-based products, which have enabled them to significantly reduce the time-to-market for their SoC roadmap," said John Rayfield, VP US Marketing, ARM. "The licensing of the ARM926EJ-S core now enables them to further this success in sophisticated SoCs aimed at a wide variety of applications." The advanced features of the ARM926EJ-S core are an ideal match for the next-generation SoC products that Atmel is developing. Based on one of the richest libraries of qualified IP blocks in the industry (including embedded memories, industry-standard interfaces and high-performance analog), Atmel has developed a series of ARM core-based platforms that can be rapidly evolved into high-performance, low-power ASICs, ASSPs or Standard Products according to client and market requirements. These products form the basis of Atmel's SiliconCITY platform-based products which are aimed at fast-growing applications areas such as GPS, telematics, mobile communications, portable data storage, high-security point-of-sale terminals, wireless networking (WiFi and Bluetooth), digital rights management and next-generation digital multimedia. One of the first products based on the ARM926EJ-S core will be a SoC for advanced multimedia applications. The ARM926EJ-S core features flexible instruction and data cache memories, tightly-coupled memory (TCM (1) (Trellis-Coded Modulation/Viterbi Decoding) A technique that adds forward error correction to a modulation scheme by adding an additional bit to each baud. TCM is used with QAM modulation, for example. ) interfaces and a memory management unit (MMU (Memory Management Unit) The part of the computer that governs memory access. Either part of the CPU chip or housed on separate chips, the MMU controls memory partitions and virtual memory. See memory and virtual memory. MMU - Memory Management Unit ) that enhances the partitioning and security features of advanced real-time operating systems. It has separate instruction and data AHB AHB Advanced High-performance Bus AHB Assault Helicopter Battalion AHB Air Historical Branch AHB Attack Helicopter Battalion AHB Automatic Half Barriers AHB Aussie Home Brewers AHB Active Hyper Bass interfaces for multi-layer AHB-based systems. It includes a 16 x 32-bit multiplier and DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive instructions that give it the single-cycle MAC capability demanded by high-bandwidth signal-processing applications. It supports 16-bit Thumb instructions and Java bytecode execution via its Jazelle technology. |
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