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Atmel and Astek Demonstrate New ASIC Platform-based Partitioning Design Tool at Embedded Systems Show.


Business Editors/High-Tech Writers

Embedded Systems Embedded systems

Computer systems that cannot be programmed by the user because they are preprogrammed for a specific task and are buried within the equipment they serve.
 Conference San Francisco San Francisco (săn frănsĭs`kō), city (1990 pop. 723,959), coextensive with San Francisco co., W Calif., on the tip of a peninsula between the Pacific Ocean and San Francisco Bay, which are connected by the strait known as the Golden  2003

SAN FRANCISCO--(BUSINESS WIRE)--April 23, 2003

Synthesis Tool Independent APART(TM) Software Speeds RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences;  Verification;

This Tool Will Be Demonstrated at Atmel's Booth #918 at the

Embedded Systems Conference in San Francisco April 23rd - 25th

Atmel(R) Corporation (Nasdaq:ATML ATML Automatic Test Markup Language
ATML Automated Test Markup Language
) and Astek Corporation will demonstrate a new partitioning tool developed by Astek for rapid validation of Atmel's platform-based ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  designs. Astek's Advanced Partitioning Tool (APART) allows customers to implement their design without making RTL modifications and automatically preserves design hierarchy, creating a significant time-to-market advantage. With this combination of APART and Atmel's platform-based design flow, customers can expect to complete and validate their ASIC designs in less than four months.

APART is a software tool that enables a designer to automatically partition a large design done in RTL into smaller entities that can be targeted to FPGAs or off-the-shelf components. In performing the partitioning, it preserves the design hierarchy and creates all of the necessary interconnect between the smaller entities to ensure there is identical functionality to the original design. APART and any FPGA-based development platform is the one-two punch one-two punch
n.
1. A combination of two blows delivered in rapid succession in boxing, especially a left lead followed by a right cross.

2. Informal An especially forceful or effective combination or sequence of two things.
 that allows ASIC designers to verify their RTL code in hardware in a matter of days. This combination of hardware and software gives ASIC designers confidence that their ASIC prototype functionality is identical to their final ASIC functionality. Firmware and application software development can start months before silicon is started and can be used to optimize the hardware logic prior to tape out.

"This combination of Atmel's standard hardware platforms with validated IP and Astek's APART software puts FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market.  prototyping back as a milestone in the schedule, rather than a project in itself," commented Jay Johnson, Director of North American North American

named after North America.


North American blastomycosis
see North American blastomycosis.

North American cattle tick
see boophilusannulatus.
 ASIC/ASSP Marketing for Atmel Corporation. Atmel and Astek announced a strategic partnership committed to helping customers get to market with a first pass success in the fall of 2002. Bundling Astek's Application Testing and Total Emulation of System Technology (ATTEST(TM)) and Atmel's system-on-chip devices is the focus of this effort. ATTEST is a hardware emulation and verification process methodology that can perform up to three levels of verification prior to a hard silicon commitment

Details on pricing and availability will be provided with any new ASIC design quote from Astek. Atmel Corporation and Astek continue to develop their strategic partnership committed to helping ASIC customers get to market in record time with first-pass success.

About Atmel

Founded in 1984, Atmel Corporation is headquartered in San Jose, California San Jose (IPA: /ˌsænhoʊˈzeɪ/) is the third-largest city in California, and the tenth-largest in the United States. It is the county seat of Santa Clara County. , with manufacturing facilities in North America and Europe. Atmel designs, manufactures and markets worldwide, advanced logic, mixed-signal, nonvolatile memory and RF semiconductors. Atmel is also a leading provider of system-level integration semiconductor solutions using CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. , BiCMOS, SiGe, and high-voltage BCDMOS process technologies.

About Astek

Astek Corporation is a rapidly growing company providing Application Specific Integrated Circuits (ASIC), Field Programmable Gate Arrays (FPGA), board level, software, and firmware design services. Located in the shadow of Pikes Peak in Colorado Springs, Colorado The City of Colorado Springs is the second most populous city (after Denver) in the state of Colorado and the 48th most populous city in the United States.[4] The city is the county seat of El Paso County. , we are committed to providing top-quality services ranging from augmentation of engineering staff to turnkey solutions.

Note to Editors: Atmel and the Atmel logo are registered trademarks of Atmel Corporation. APART is a trademark of Astek. Other terms and product names may be the trademarks of others.

Information

Atmel's ASIC product information may be retrieved at www.atmel.com. For more information on Astek please visit www.astekcorp.com.
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Publication:Business Wire
Geographic Code:1USA
Date:Apr 23, 2003
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