Atmel Creates First Single-Chip DVD/CD SoC Using Cadence Encounter Test; New Encounter Test Architect Delivers Fast Time to Market and Excellent Test Coverage for Advanced Semiconductor Industry Leader.SAN JOSE, Calif. -- Cadence Design Systems, Inc. (Nasdaq:CDNS) today announced that its new Cadence(R) Encounter(R) Test Architect technology has helped Atmel Corp. successfully tape out Atmel's first single-chip DVD/CD system-on-chip (SoC). With Encounter Test, Atmel's geographically distributed design team was able to fast track its project. This helped Atmel complete test insertion and automatic test pattern generation (ATPG) on time to achieve high-quality, first-pass manufacturing success. Atmel's recently announced AT78C4050 is a SoC focused on driving down cost and complexity for next-generation, high-performance optical disc-drive designs. With this product, designers can, for the first time, use a single-chip controller that provides all analog and digital functions for red and blue laser A semiconductor laser that emits light in the 400-450 nm range. It has been exceedingly more difficult to develop blue lasers than other colors with larger wavelengths, but blue lasers became commercially available in 2001. Blue diode lasers allow for smaller pits to be used in optical discs (CD-ROMs use 780 nm pits; DVDs are 630 nm). Blue LEDs (a related technology) are expected to be used in display screens in the future. See laser and Blu-ray. DVD and CD from servo system to ATAPI interface. Its integrated partial response, maximum likelihood (PRML PRML - Partial Response Maximum Likelihood) read channel A circuit in a disk drive that encodes the data bits into flux changes for recording and decodes the magnetic flux changes into bits for reading. technology provides higher speed, higher density and improved performance over any currently available products. "We used a globally distributed design team for this complex, first-in-class product," said Mehdi Bathaee, Atmel's Network Storage Business Unit general manager. "Inserting the test and generating patterns in time for tapeout was key to our project's success. With Encounter Test, and the Cadence team's support, we achieved our time-to-tapeout and exceeded test coverage (testing) Test coverage - A measure of the proportion of a program exercised by a test suite, usually expressed as a percentage. This will typically involve collecting information about which parts of a program are actually executed when running the test suite in order to identify which branches of conditional statements which have been taken. The most basic level of test coverage is code coverage testing and the most methodical is path coverage testing. objectives." "Atmel's experience is an example of how Encounter Test Architect's unique compiler-based methodology inserts all required test structures with its automatic test infrastructure compilation and verification methodology -- all from a single specification," said Sanjiv Taneja, vice president of R&D for Encounter Test at Cadence. "We are proud to have contributed to Atmel's significant achievement with this design." About Cadence Cadence enables global electronic-design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, printed-circuit boards and systems used in consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2004 revenues of approximately $1.2 billion, and has approximately 5,000 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com. Cadence, the Cadence logo and Encounter are registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners. |
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