Aspec Technology Announces Industry's First 0.18-Micron Copper Interconnect Semiconductor IP Libraries.

SUNNYVALE, Calif.--(BUSINESS WIRE)--Oct. 19, 1998--

New High-Density, Low-Power Libraries Maximize IC

Performance for Consumer, Wireless and Portable Applications

Aspec Technology Inc. (Nasdaq:ASPC), a leading independent provider of semiconductor intellectual property (SIP) libraries and design services, today announced availability of the industry's first 0.18-micron Copper Interconnect SIP libraries.

Unlike traditional metal integrated circuit (IC) architectures that "blend" or trade-off performance and density characteristics, Copper Interconnect IC process technology enables designers of complex ICs to maximize both performance and density, particularly for consumer electronics applications.

Aspec's 0.18-micron libraries offer the first comprehensive set of copper-based building blocks for the development of complex ICs, such as system-on-chip (SOC). The 0.18-micron libraries include Aspec's industry leading range of I/O offerings, with variable height and slot pitch IP for reduced die size requirements.

Aspec has segmented its leading memory IP into high density/low power, and high-performance products with BIST built-in. Rounding out the 0.18-micron SIP offerings, Aspec now provides an unmatched set of mixed-signal cells, including A/D, D/A, PLLs, Frequency Lock Loops and Frequency Synthesizers.

"Copper-based SIP is one of the most promising new developments in IC process technology in the past 10 years," noted Conrad Dell 'Oca, president and CEO of Aspec Technology. "With this technology, customers are able to eliminate the performance trade-off decisions they were forced to make with existing general purpose architectures.

"We strongly believe that our introduction of 0.18-micron Copper Interconnect SIP libraries will not only give us a competitive edge but will help customers who are planning ICs for advanced consumer applications to make the transition to 0.18-micron much sooner than they would have with mainstream architectures."

0.18-micron Copper SIP Library Benefits

High density/low power architectures are becoming the critical component in today's deep sub-micron system-on-chip designs, as they dictate the performance capabilities of the final consumer product. Highly optimized and efficient SIP building blocks, such as those offered by Aspec and its foundry partners, allow SOC designers to optimize the die real estate and achieve higher levels of performance while minimizing power consumption.

0.18-micron Copper-based SOCs will be used in a wide range of applications including low power ICs for battery-operated notebook computers and cell phones, as well as high performance memory ICs for workstation, multimedia, graphics and networking applications.

With this announcement, "Aspec Technology continues to provide break-through SIP products, such as our new 0.18-micron Copper SIP libraries for emerging consumer IC market applications," noted Mick Bohn, COO for Aspec. "Having a broad, advanced-technology product portfolio is important to customers that are implementing a customer owned tooling (COT) model, or transitioning from an ASIC to COT model, and want best-in-class SIP available at multiple foundries."

Product Availability and Pricing

Aspec's 0.18-micron Copper Interconnect SIP libraries are available immediately for implementation at the world's leading IC foundries. Pricing is configuration-dependent based on each customer's development requirements.

About Aspec Technology

Aspec Technology Inc. (Nasdaq:ASPC) is a leading independent provider of semiconductor intellectual property (SIP) libraries and design services for complex IC (Integrated Circuit) design and development. Aspec customers can significantly reduce the development time and costs associated with bringing deep sub-micron IC designs to successful silicon fabrication.

Aspec's verifiable physical IP libraries provide customers with the essential building blocks for developing complex ICs and system-on-chip (SOC) products. The company offers cell-based foundation IP, including I/Os, memories, macrocells, and core cells and complex functions that are tuned to each manufacturer's process.

Aspec's SIP libraries and design services are used by the leading ASIC/IC/ASSP companies, electronic systems design companies and foundries worldwide. Aspec is located at 830 East Arques Avenue, Sunnyvale, CA 94086. More information is available at http://www.aspec.com.

This news release contains forward-looking statements related to Aspec which are based on current expectations, that includes statements regarding the company's future expectations, beliefs, hopes, intentions and strategies. These forward-looking statements may involve substantial risks and uncertainties, including risks relating to the success of Copper Interconnect-based 0.18-micron process technology for complex IC products and their application performance. Actual results and developments therefore may differ materially from those described in this release. For more information about Aspec and risks arising when investing in Aspec, you are directed to Aspec's most recent reports on Form 10-Q and recent registration statement on Form S-I as filed with the United States Securities and Exchange Commission.