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Arithmatica Announces Floating Point Library Customer in Advanced 3D Graphics Group.


Warwick, U.K. -- Arithmatica, the leading provider of focused datapath synthesis solutions for silicon math, demonstrates the power of its CellMath floating point library in an advanced FPGA-based graphics pipeline architecture.

The Computer Graphics Laboratory at ETH Zurich “ETH” redirects here. For other uses, see ETH (disambiguation).
The ETH is an internationally oriented university. It is a founding member of the IDEA League and the International Alliance of Research Universities IARU.
 (http://graphics.ethz.ch), the leading Swiss technology and science university, has been using Arithmatica's CellMath Builder datapath synthesis tool to develop advanced 3D graphics processing See graphics pipeline and DeBabelizer.  technology.

CellMath Builder is a synthesis tool that comprises a parametrisable and fully flexible, high performance library of floating point designs. The tool has delivered outstanding results for 3D graphics circuits with the ir extreme requirements for high performance, low area and low power floating point operations, and has consistently won benchmark tests against previous designs and competing tools.

Arithmatica's CellMath solutions not only deliver best-in-class quality of results from a performance, power and area perspective, but also make integration of the tools into standard implementation and verification flows extremely easy. CellMath's floating point cores are all formally verifiable, to ensure the equivalence of gates and RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences;  models. The tools automatically generate a bit-accurate C model of each design to facilitate validation of functionality.

Tim Weyrich, of ETH Zurich, said: "We have successfully used Arithmatica's CellMath Builder with its floating point libraries for our graphic applications. We selected the tool for its excellent performance, high degree of flexibility, simple integration into our FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market.  design flow, the broad range of output models and for the bit accurate C models to support our verification flow. Our project required small latencies at high clock frequencies, CellMath Builder allowed us to achieve this aggressive performance and latency targets in short time."

Tony Curzon Price, CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board.  of Arithmatica, said: "I am very pleased we have been selected by ETH eth  
n.
Variant of edh.
, with its reputation for excellence in engineering and cutting-edge research. The 3D graphics market is very exciting at the moment, with a whole new generation of games consoles coming on stream, with Vista requiring graphics heavy lifting and with a number of new embedded applications, for example in car navigation See GPS.  and cell phones. Arithmatica supplies the best-in-class building blocks for chip makers in this space, and the work that ETH is doing shows that our solutions apply to the next generations of technology as well as to today's."

Pricing and Availability

Arithmatica actively markets and supports its products in North America North America, third largest continent (1990 est. pop. 365,000,000), c.9,400,000 sq mi (24,346,000 sq km), the northern of the two continents of the Western Hemisphere. , Europe, Japan, Korea and Taiwan. The CellMath Designer, Builder and Optimizer tools are term licensed with US single copy annual license fees ranging from $19,000 to $129,000.

About Arithmatica

Arithmatica is the first company focused solely on using advances in silicon math algorithms to lower costs and power and increase speed for math-intensive ICs, such as those used in 3D graphics, imaging, multimedia, wireline and wireless communications wireless communications

System using radio-frequency, infrared, microwave, or other types of electromagnetic or acoustic waves in place of wires, cables, or fibre optics to transmit signals or data.
, and embedded processing. Its unique technology, available through its tools products and design services, provides differentiated improvement to licensees' ICs. The company received its first venture funding in 2001 and is headquartered in Warwick, UK, with sales and support operations in Palo Alto, California “Palo Alto” redirects here. For other uses, see Palo Alto (disambiguation).
Palo Alto (IPA: /ˌpæloʊˈʔæltoʊ/, from Spanish: palo: "stick" and alto: "high", i.e.
. For further information about how its silicon math solutions increase silicon efficiency and boost productivity, please visit: www.arithmatica.com.
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Copyright 2006, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:May 24, 2006
Words:522
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