Ariel PCI board combines TMS320C80 DSP with high-resolution graphics.HIGHLAND PARK, N.J.--(BUSINESS WIRE)--May 24, 1995--Ariel Corp. (NASDAQ NASDAQ in full National Association of Securities Dealers Automated Quotations U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on :ADSP ADSP - AppleTalk Data Stream Protocol ) announces Griffin, a PCI-bus plug-in board based on Texas Instruments' TMS320C80 parallel digital signal processor A digital signal processor (DSP) is a specialized microprocessor designed specifically for digital signal processing, generally in real-time computing. Characteristics of typical Digital Signal Processors
Featuring up to 8 Mbytes of on-board DRAM and a full 32-bit master/slave PCI bus interface, Griffin also features a 24-bit RGB graphics interface with a 4 Mbyte video RAM frame buffer. To support memory expansion, I/O and other peripheral options, Griffin also provides a high-performance stackable mezzanine bus interface that provides direct access to the C80's key signals. Griffin provides five on-board memory resources: 8 Mbytes of 60-nsec DRAM, organized as 1M x 64 bits; 4 Mbytes of VRAM See video RAM. VRAM - video random-access memory frame buffer memory organized as 512K x 64 bits, which is dedicated to Griffin's RAMDAC (Random Access Memory Digital to Analog Converter) The VGA controller chip that maintains the color palette and converts data from memory into analog signals for the monitor. RAMDAC - Random Access Memory Digital-to-Analog Converter ; a 512 x 32-bit synchronous, bi-directional FIFO (First In First Out) A storage method that retrieves the item stored for the longest time. Contrast with LIFO. See traffic engineering methods. FIFO - first-in first-out , which is used for streaming data between the C80 DSP and PCI-bus interface; a 4K x 32-bit dual-ported RAM, which is dual-ported between the C80 and the PCI bus, and used to transfer boot code, commands/parameters and other small blocks of data at high speed; and a 512k x 8-bit flash EEPROM (Electrically Erasable Programmable ROM) A rewritable memory chip that holds its content without power. Although EEPROMs spawned flash memory, EEPROMs are byte addressable at the write level, whereas flash chips must erase a block of bytes before rewriting. . Griffin's video output is based on the Texas Instruments TVP3025 RAMDAC, an advanced RGB RAMDAC that supports a wide variety of video resolutions, an overlay plane and a VGA pass-through input with hardware windowing. The video output provides resolutions of up to 1600 x 1280 at 16 bits/pixel with up to 65,336 colors and 1024 x 768 at 24 bits/pixel with up to 16 million colors. Griffin includes a full 32-bit master/slave PCI-bus interface. To perform read and write operations as a bus master, the host programs the control registers in the bus-interface ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. with a start address and a transfer count -- independent control registers for reading and writing allow concurrent bi-directional transfers. Read and write operations can then be performed simultaneously and independently. The use of a dual-ported RAM and FIFO between the C80 and PCI (1) (Payment Card Industry) See PCI DSS. (2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus). interface enables two methods of data transfer. Bus master operations can use the FIFO in both directions concurrently for high-speed data streaming. The dual-ported RAM can also be used as a target for slave cycles initiated by the host CPU CPU in full central processing unit Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit. . This permits fast and painless full-duplex communications for both data and command channels. Griffin's PCI interface uses an 8k x 8-bit flash EEPROM to store configuration information that is needed for PCI-bus automatic configuration. This memory can also be used to store an "adaptor" or "BIOS" ROM image that is executed when the computer is booted. Griffin's mezzanine interface is a stackable design that gives designers direct access to the C80's address and data buses, including interrupts, the clock and control signals. Up to four mezzanine cards, measuring roughly 3-inch x 5-inch, can be stacked on 0.4-inch centers. Ariel will support Griffin with a family of mezzanine modules. The first module will be an NTSC/SVIDEO/PAL decoder, which takes a standard video input and decodes it into a 16- or 24-bit YCrCb or RGB output with FIFO buffering. Ariel will also offer a memory module with up to 32 Mbytes of DRAM organized as 4M x 64 bits. Griffin costs $8,995 and is available Q3 of this year. OEM discounts available. XDS Development System Development support for Griffin includes an ANSI C compiler and TI's XDS in-circuit emulator. The SPARC-hosted emulator, which includes an assembler, linker and C source level debugger, provides full-speed emulation and monitoring of Griffin's C80. The XDS features global run, stop and breakpoint The location in a program used to temporarily halt the program for testing and debugging. Lines of code in a source program are marked for breakpoints. When those instructions are about to be executed, the program stops, allowing the programmer to examine the status of the program for multiple DSPs, register and memory loading, inspection and modification, and single-step execution. It also features software breakpoint, trace, and timing with up to 30 software breakpoints, and hardware breakpoint and trace on all programs and data addresses. A 5-wire JTAG interface provides a JTAG scan path to every location within the C80's memory and registers. Griffin also comes with a JTAG ASIC, which will enable the board to be debugged in its native PC environment as soon as TI completes their PC port of the XDS software. More on Ariel Ariel, based in Highland Park, offers the industry's most complete range of advanced OEM digital signal processing See DSP. Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled). hardware and software. The company's board-level products, hardware/software development tools, and custom DSP hardware/software are used in a wide range of industrial, commercial, military/government, educational and research applications. Ariel's board-level DSP products are based on DSP chips from AT&T, Motorola, Analog Devices and Texas Instruments. These boards are compatible with a wide range of host computers, including PC XT/AT systems, ISA/EISA-compatible systems, VMEbus systems, SPARCstations and other SBus-compatible systems. Other products include advanced DSP development tools such as emulators, debuggers, libraries and extensive third-party software support from companies such as Alta Group, Entropic Research, Hyperception, ISI ISI International Sensitivity Index, see there , Momentum Data Systems, Perihelion perihelion (pĕr'əhē`lēən), point nearest the sun in the orbit of a body about the sun. See apsis. Distributed Software Ltd., Signalogic, Spectron Microsystems, Tartan, 3L Ltd., and Wind River Systems. For more information, please contact Ariel Corp. at 433 River Road, Highland Park, N.J. 08904. Phone: 908/249-2900. Fax: 908/249-2123. E-mail: ariel@ariel.com. Electronic BBS: 908/249-2124. -0- Note to Editors: Griffin is a trademark of Ariel Corp. All other brands and product names are trademarks or registered trademarks of their respective owners. CONTACT: Ariel Corp. Ted Raineault, 619/675-9200 or Davis-Marrin Ken Marrin, 619/573-0736 |
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