Arasan Chip Systems Launches Industry's First Suite of MIPI IP Cores.

Designers Lower Their Development Costs by Using Reusable Mobile Interconnect IP

SAN JOSE, Calif. -- Arasan Chip Systems, Inc. ("Arasan"), a leading supplier of reusable Intellectual Property (IP) cores, semiconductors and design services, today announced the availability of a suite of IP Cores that support the emerging MIPI[TM] (Mobile Industry Processor Interface) standards. The new products available include the Display Serial Interface (DSI) IP Core, the Camera Serial Interface (CSI-2) IP Core, and the D-PHY IP Core. The SLIMbus(TM) IP Core (Serial Low-power Inter-chip Media bus) supporting the preliminary draft specification is also available. In addition to the hardware IP, Arasan provides Software drivers and stacks for a number of the interface protocols. Also available is a separate set of Verification IP including bus functional models and tests that can be used to validate the operation of the IP in a unit test and systems environment. Each test platform comes with a set of directed tests designed to exercise the elements of the protocol.

All the products are silicon validated and were successfully demonstrated at the MIPI Conference in Seoul, South Korea, November of 2006. Further, Arasan has licensed the MIPI IP and is working closely with some of the largest World's largest semiconductor companies, including founding members of the MIPI Alliance, whose products include application processors for low power mobile devices and peripheral chips in wireless, display and imaging applications.

"Arasan Chip Systems has actively contributed to the MIPI organization since 2004," said Kevin Walsh, Vice President of Marketing of Arasan Chip Systems. "We continue to work with our lead customers to help them deploy these standards into IC's successfully. We are now making this IP and know how available for other MIPI member companies who need to begin to integrate them into their products."

The Layer 2 Digital IP is packaged as synthesizable RTL form has interfaces to common systems buses like ARM's AMBA AHB bus. Layer 1 Mixed-signal IP is foundry dependent and shipped as GDSII. Custom interfaces will be developed as needed under a special contract. The Software drivers are constructed with a general host/device adaptation layer and application interface layer for easy adaptation and porting to customer specific applications. The Verification IP is shipped in source form and is designed to provide functional coverage of the specifications using an extensive test suite. The MIPI products conform to Arasan's Total Technology Solution guidelines.

Arasan is the leading provider of IP Cores to for the Mobile Low Power Market. The launch of the Industry's First MIPI IP Cores continues our commitment to this important Market. Our goal is to provide our customers with the IP that meets their time-to-market requirement at the level of quality and service they have always experienced with Arasan. Just as Arasan was the first to launch SDIO, MMC4.0 and CE-ATA for the Mobile Market, our customers will be among the first to take the MIPI IP to final product.

For more information visit http://www.arasan.com/totalmipi.

About MIPI

The Mobile Industry Processor Interface (MIPI) Alliance is a collaboration of mobile industry leaders with the objective to define and promote open standards for interfaces to mobile application processors.

Through these open standards, the MIPI Alliance intends to speed deployment of new services to mobile users by establishing specifications for standard hardware and software interfaces to mobile application processors and encouraging the adoption of those standards throughout the industry value chain.

The MIPI Alliance is intended to complement existing standards bodies with a focus on microprocessors, peripherals and software interfaces.

MIPI Specifications are currently available only to MIPI Alliance member companies. Interested companies are welcome to join the MIPI Alliance. Membership includes limited royalty-free intellectual property rights and obligations. For more information on membership in the MIPI Alliance, visit http://www.mipi.org.

Total Technology Solution

Arasan provides a Total Technology Solution to all its licensees including IP source code, a test environment, sample device drivers, synthesis scripts, and complete technical documentation. The Total Technology Solution also includes optional Product Design Development tools like the Hardware Validation Platform and Software targeted for Linux. Custom bus integration services are offered to integrate the IP in a customer specific manner.

Arasan's Validation Platform is a stand-alone board with used for compliance testing of as well as prototyping, including driver development. The Validation Platform is the easiest way to prototype and to demonstrate compliance for customers. The Platform is available for purchase.

Pricing and Availability

Arasan's MIPI IP Cores are available immediately. For pricing information please contact [e-mail].

About Arasan

Arasan Chip Systems Inc. founded in 1995, is a leading supplier of Reusable Intellectual Property (IP's) cores, semiconductors and electronic design services. Arasan's product portfolio is focused on Bus Interfaces and includes IP's for MIPI, USB 1.1 & 2.0, PCI & PCIe, SDIO and CE-ATA technologies. Arasan's products and services enable businesses to develop and leverage product design and development. Arasan Chip Systems has been an executive member of SD Card Association since 2001, MMCA since 2003 and CE-ATA and MIPI since 2004. Arasan is headquartered in San Jose, California, with design centers in India and support options available in Taiwan, China & Europe.

Visit: www.arasan.com for more product information.

Arasan, and the Arasan Logo, are trademarks or trademarks of Arasan. SDIO, CE-ATA, USB, PCI, MMCA, are all trademarks of their respective organizations.

MIPI[TM] and SLIMbus[TM] word marks and logos are trade marks owned by MIPI Alliance, Inc. and any use of such marks by (Member Company) is under license.