Apache Design Solutions to Present Power and Noise Solutions for 90/65/45nm SoC Designs at 2007 DATE Conference.MOUNTAIN VIEW, Calif. -- Apache Apache (əpăch`ē), Native North Americans of the Southwest composed of six culturally related groups. They speak a language that has various dialects and belongs to the Athabascan branch of the Nadene linguistic stock (see Native American Design Solutions, the leader in power signoff and complete silicon integrity platform solutions for system-on-chip (SoC) designs, today announced that the company will present their power and noise solutions for silicon integrity of 90/65/45nm SoC designs at the DATE (Design Automation and Test Europe) conference held on April 17-19, 2007 in Nice, France. Apache's customers, STMicroelectronics and NXP NXP Next Experience (formerly Philips Semiconductors) Semiconductor, will also be presenting their experience with Apache's products at the Exhibition Theatre on April 17th at 12:20 p.m. and April 19that 11:20 a.m., respectively. STMicroelectronics will present how Apache's PsiWinder helped them explore dynamic electrical effects on the clock network, and analyze and fix clock jitter A flicker or fluctuation in a transmission signal or display image. The term is used in several ways, but it always refers to some offset of time and space from the norm. For example, in a network transmission, jitter would be a bit arriving either ahead or behind a standard clock cycle issues in their designs. NXP will share how Apache's RedHawk enabled them to manage the dynamic voltage drop Noun 1. voltage drop - a decrease in voltage along a conductor through which current is flowing free fall, drop, dip, fall - a sudden sharp decrease in some quantity; "a drop of 57 points on the Dow Jones index"; "there was a drop in pressure in the pulmonary of their high-frequency low-power mixed-signal designs, thus allowing them to meet the challenging signal and noise specifications.
WHO: Apache Design Solutions, Inc.
WHAT: Presentation and demonstration of power and noise solutions for
silicon integrity of SoC designs.
-- Testimonial presentation titled "Clock tree analysis in the
light of dynamic electrical effects using Apache's PsiWinder
tool" by Vincent Grenet, Digital Methodologies & Design Support
Engineer, STMicroelectronics.
-- Testimonial presentation titled "Power integrity analysis for
high frequency, low-power mixed-signal designs using Apache's
RedHawk" by Patrick Renaud, Senior SoC Designer, NXP
Semiconductor.
WHERE: 2007 DATE Conference, Acropolis, Nice, France. For more
information please visit www.date-conference.com.
WHEN: Tuesday, April 17, 2007 - Thursday, April 19, 2007
About Apache Design Solutions Apache delivers the leading power sign-off solution adopted by 80% of top semiconductor companies and a complete platform solution for silicon integrity of low-power, high-performance system-on-a-chip (SoC) designs. Apache's innovative platform considers all sources of noise that impacts the design--such as power, signal, package/system IO, substrate The base layer of a structure such as a chip, multichip module (MCM), printed circuit board or disk platter. Silicon is the most widely used substrate for chips. Fiberglass (FR4) is mostly used for printed circuit boards, and ceramic is used for MCMs. , and temperature--Apache's silicon integrity platform enables designers of leading networking, wireless, communication, consumer, and semiconductor companies to detect, fix, and prevent design weaknesses that can result in reduced yield or failed silicon. Apache's vendor-neutral solution enables designers to adopt any industry-standard physical design flow and is certified See certification. by TSMC's 5.0, 6.0, and 7.0 Reference Flow (NYSE NYSE See: New York Stock Exchange :TSM TSM Tivoli Storage Manager TSM Transportation System Management TSM Taiwan Semiconductor Manufacturing (stock symbol) TSM Taiwan Semiconductor Manufacturing Co. Ltd. ). For more information, visit www.apache-da.com. |
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