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Apache Design Solutions to Hold In-Suite Technical Tutorials on Dynamic Power Analysis and Full-chip Clock Jitter Analysis at DAC.


MOUNTAIN VIEW, Calif. -- Apache Apache (əpăch`ē), Native North Americans of the Southwest composed of six culturally related groups. They speak a language that has various dialects and belongs to the Athabascan branch of the Nadene linguistic stock (see Native American  Design Solutions, the leader in power signoff and complete silicon integrity platform solutions for system-on-chip (SoC), analog intellectual property (IP), and system designs, today announced that they will be holding free technical tutorials at the design automation conference (DAC See D/A converter and discretionary access control.

DAC - Digital to Analog Converter
) in San Diego, California “San Diego” redirects here. For other uses, see San Diego (disambiguation).
San Diego is a coastal Southern California city located in the southwestern corner of the continental United States. As of 2006, the city has a population of 1,256,951.
. In these tutorials, the customers will gain hands-on experience by running Apache's RedHawk for dynamic power analysis and optimization and PsiWinder for full-chip clock jitter A flicker or fluctuation in a transmission signal or display image. The term is used in several ways, but it always refers to some offset of time and space from the norm. For example, in a network transmission, jitter would be a bit arriving either ahead or behind a standard clock cycle  analysis and timing margin management. To register, go to www.apache-da.com/apache-da/Home/NewsandEvents/Seminars.html#tutorial
RedHawk Tutorial
WHAT:    Free technical tutorial including hands-on experience on
         dynamic power analysis and optimization from early design to
         signoff using RedHawk.
WHERE:   Apache Booth #6382
         Design Automation Conference
         San Diego Convention Center, San Diego, CA
WHEN:    Tuesday, June 5, 2007 at 2:00 PM - 3:30 PM

PsiWinder Tutorial
WHAT:    Free technical tutorial including hands-on experience on
         full-chip clock jitter analysis in the presence of crosstalk
         and power noise using PsiWinder.
WHERE:   Apache Booth #6382
         Design Automation Conference
         San Diego Convention Center, San Diego, CA
WHEN:    Monday, June 4, 2007 at 2:00 PM - 3:30 PM
         Wednesday, June 6, 2007 at 2:00 PM - 3:30 PM


About Apache Design Solutions

Apache delivers the leading power sign-off solution adopted by 80% of top IDM (1) See identity management.

(2) (Integrated Device Manufacturer) A company that performs every step of the chip-making process, including design, manufacture, test and packaging. Examples of IDMs are Intel, AMD, Motorola, IBM, TI and Lucent.
, fabless semiconductor, and foundries and a complete platform solution for silicon integrity of SoC, analog IP, and system designs. Apache's innovative platform considers all sources of noise that impacts the design--such as power, signal, package / system IO, substrate, and temperature--Apache's silicon integrity platform enables designers of leading networking, wireless, communication, consumer, and semiconductor companies to detect, fix, and prevent design weaknesses that can result in reduced yield and failed silicon or system. Apache's vendor-neutral solutions enable designers to adopt any industry-standard physical design flow and are certified by TSMC's Reference Flows (NYSE NYSE

See: New York Stock Exchange
:TSM TSM Tivoli Storage Manager
TSM Transportation System Management
TSM Taiwan Semiconductor Manufacturing (stock symbol)
TSM Taiwan Semiconductor Manufacturing Co. Ltd.
). For more information, visit www.apache-da.com.
COPYRIGHT 2007 Business Wire
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Copyright 2007, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:May 24, 2007
Words:316
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