Apache Announces Sahara-PTE, the Industry's First Integrated Power-Thermal-Electrical Solution for SoC Designs.

MOUNTAIN VIEW, Calif. -- Apache Design Solutions, the technology leader in full-chip dynamic power and noise solutions for system-on-chip (SoC) designs, today announced Sahara-PTE, a fully integrated electro-thermal solution for SoC temperature's impact on leakage, timing, reliability, and voltage drop. Sahara's tightly integrated Power-Thermal-Electrical (PTE) analysis deliver accuracy, capacity, performance, and ease-of-use for fast convergence of power and thermal distribution. Sahara-PTE expands Apache's Silicon Integrity Platform of power integrity with RedHawk and timing/noise integrity of PsiWinder. The layout-driven platform encompasses self-consistent flow of built-in power/thermal/noise library and custom macro characterization, incremental RLC extraction, high-capacity network solver, timing impact modeling, and fix and optimization (FAO).

For designs at 90nm and below, managing leakage current has become one of the key design challenges. To accurately analyze chip leakage, the designers need to consider the temperature variation of the chip based on transistor switching current. Sahara offers the industry's first fully integrated power-thermal iterative solution, based on its 3D thermal model and RedHawk's silicon proven high-capacity simulation kernel. It takes in the location-based boundary temperature conditions or extracted package thermal model for fast and accurate power-thermal convergence.

Chip temperature also affects the metal resistivity, interconnect self-heating, and voltage drop across the design. Based on the converged power-thermal distribution, Sahara-PTE subsequently analyzes the impact on resistance extraction, wire electro-migration, and voltage drop. By considering the temperature variation across the chip instead of using constant corner values, Sahara-PTE also provides a much more accurate full-chip, critical path, and clock timing for silicon sign-off.

"Apache continues to lead the market in addressing the critical design needs as we move toward 65 and 45nm processes," said Andrew Yang, CEO of Apache. "Our new product enables IC designers to better understand the temperature impact on their designs, as well as the system designers to make package and board selections trade-offs. Sahara-PTE is Apache's commitment to expand our solutions for critical silicon integrity signoff."

Pricing and Availability

Sahara-PTE will be available this quarter for production use. Annual license pricing starts at $160,000 US list.

About RedHawk

RedHawk is a full-chip Vectorless Dynamic(TM) physical power integrity solution for SoC power closure sign-off of 130nm, 90nm, and 65nm designs. Certified by TSMC's 5.0 and 6.0 Reference Flow and correlated with silicon measurements and SPICE, RedHawk addresses dynamic power issues such as simultaneous switching output (SSO) for core, memory, clock, and I/O, as well as effects of on-chip inductance, package RLC, and decoupling capacitance. RedHawk delivers transistor-level accuracy with cell-based capacity, performance, and ease-of-use.

With RedHawk designers can identify dynamic "hot spots," examine the impact on timing, accurately pinpoint the cause of dynamic voltage drop, and automatically repair the source of supply noise. RedHawk enables designers to reach power closure sign-off for high performance SoCs, including those utilizing advanced low-power design techniques such as leakage current control, MTCMOS (power-gating), multiple voltage domains, and multiple threshold transistors.

About Apache Design Solutions

Apache is an EDA software supplier of innovative next-generation silicon integrity platforms for low-power, high-performance system-on-a-chip (SoC) designs. By considering all sources of noise that impacts the design -- such as power, signal, package/system IO, substrate, and temperature -- Apache's silicon signoff platform enables designers of leading networking, wireless, communication, consumer, and semiconductor companies to detect, fix, and prevent design weaknesses that can result in reduced yield or failed silicon. Apache's vendor-neutral platform enables designers to adopt any industry-standard physical design flow and is certified by TSMC's 5.0 and 6.0 Reference Flow (NYSE:TSM).

Apache has direct sales and support offices worldwide with over 40 customers, including 7 of the top 10 semiconductor companies. For more information, visit www.apache-da.com.

Apache Design Solutions, NSPICE, RedHawk, PsiWinder, Sahara, and Vectorless Dynamic are trademarks of Apache Design Solutions, Inc.