Anova Solutions Awarded R&D Grant for Low Power Technology Development.

SANTA CLARA, Calif. -- Anova Solutions Corporation, a Japanese subsidiary of Anova Solutions, Inc. (collectively "Anova"), announces a research and development grant from New Energy and Industrial Technology Development Organization (NEDO) for the further development of its proprietary low-power design and implementation technologies for semiconductor systems on chip. NEDO is a Japanese Government R&D funding organization. The grant funding supports the low power design and silicon test over two years.

Anova's technology enables a low power design methodology considering process variation for system on chip designs targeting both portable and tethered devices. The significant power saving advantages of the technology provides a solution for an industry which is driven towards more energy efficient products.

This new technology uses Anova's patent pending statistical modeling and data analysis techniques to enable system on chip designs to have lower power consumption and higher yields using existing design and fabrication techniques.

Anova is an electronic design automation company focusing on low power solutions for semiconductor system on chip design. Anova is focused on providing tools to the semiconductor industry which address energy and environmental challenges by reducing power consumption. For more information, visit http://www.anova-solutions.com.